21 May 2015 The implementation of compressive sensing on an FPGA for chaotic radars
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Abstract
Most of the advances in current radar systems are aimed at improving their resolution. As a result, their operating frequency has been increased from 10GHz up to 94GHz, and new millimeter-wave (100-300GHz) radar systems are currently being studied. One of the major concerns with these frequencies is the associated large bandwidth requirement. Compressive Sensing (CS), also known as Compressive Sampling, has been proposed as a solution to overcome the aforementioned problems by exploiting the sparsity of the radar signal. Using the CS method, a sparse signal can be reconstructed even if it is sampled below the Nyquist rate. This method provides a completely new way to reconstruct the signal using optimization techniques and a minimum number of observations. The objective of this research project is to investigate and develop a Chaotic Radar Imaging system that leverages Compressive Sensing (CS) technology to improve the image resolution without increasing the amount of processed data. In addition to demonstrating the validity of the proposed approach through simulations, this project seeks to develop and implement hardware prototypes for the proposed imaging radar system. Simulated chaotic radar data was generated and loaded to the FPGA board to test the algorithms and their performance. The results from implementing the Orthogonal Matching Pursuit (OMP), the Compressive Sensing Matching Pursuit (CSMP), and the Stagewise Orthogonal Matching Pursuit (StOMP) algorithms to a Xilinx ZedBoard will be presented.
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Hector A. Ochoa, Hector A. Ochoa, David H. Hoe, David H. Hoe, Dinesh Veeramachaneni, Dinesh Veeramachaneni, } "The implementation of compressive sensing on an FPGA for chaotic radars", Proc. SPIE 9461, Radar Sensor Technology XIX; and Active and Passive Signatures VI, 946110 (21 May 2015); doi: 10.1117/12.2177369; https://doi.org/10.1117/12.2177369
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