3D integration approaches for MEMS and CMOS sensors based on a Cu through-silicon-via technology and wafer level bonding

L. Hofmann; S. Dempwolf; D. Reuter; R. Ecke; K. Gottfried; S. E. Schulz; R. Knechtel; T. Geßner

doi:10.1117/12.2178598

21 May 2015 3D integration approaches for MEMS and CMOS sensors based on a Cu through-silicon-via technology and wafer level bonding

L. Hofmann, S. Dempwolf, D. Reuter, R. Ecke, K. Gottfried, S. E. Schulz, R. Knechtel, T. Geßner

Author Affiliations +

Proceedings Volume 9517, Smart Sensors, Actuators, and MEMS VII; and Cyber Physical Systems; 951709 (2015) https://doi.org/10.1117/12.2178598
Event: SPIE Microtechnologies, 2015, Barcelona, Spain

Abstract

Technologies for the 3D integration are described within this paper with respect to devices that have to retain a specific minimum wafer thickness for handling purposes (CMOS) and integrity of mechanical elements (MEMS). This implies Through-Silicon Vias (TSVs) with large dimensions and high aspect ratios (HAR). Moreover, as a main objective, the aspired TSV technology had to be universal and scalable with the designated utilization in a MEMS/CMOS foundry. Two TSV approaches are investigated and discussed, in which the TSVs were fabricated either before or after wafer thinning. One distinctive feature is an incomplete TSV Cu-filling, which avoids long processing and complex process control, while minimizing the thermomechanical stress between Cu and Si and related adverse effects in the device. However, the incomplete filling also includes various challenges regarding process integration. A method based on pattern plating is described, in which TSVs are metalized at the same time as the redistribution layer and which eliminates the need for additional planarization and patterning steps. For MEMS, the realization of a protective hermetically sealed capping is crucial, which is addressed in this paper by glass frit wafer level bonding and is discussed for hermetic sealing of MEMS inertial sensors. The TSV based 3D integration technologies are demonstrated on CMOS like test vehicle and on a MEMS device fabricated in Air Gap Insulated Microstructure (AIM) technology.

Citation Download Citation

L. Hofmann, S. Dempwolf, D. Reuter, R. Ecke, K. Gottfried, S. E. Schulz, R. Knechtel, and T. Geßner "3D integration approaches for MEMS and CMOS sensors based on a Cu through-silicon-via technology and wafer level bonding", Proc. SPIE 9517, Smart Sensors, Actuators, and MEMS VII; and Cyber Physical Systems, 951709 (21 May 2015); https://doi.org/10.1117/12.2178598

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available