4 March 2015 Charge transfer efficiency improvement of 4T pixel for high speed CMOS image sensor
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Proceedings Volume 9521, Selected Papers from Conferences of the Photoelectronic Technology Committee of the Chinese Society of Astronautics 2014, Part I; 95210B (2015) https://doi.org/10.1117/12.2087262
Event: Selected Proceedings of the Photoelectronic Technology Committee Conferences held August-October 2014, 2014, China, China
Abstract
The charge transfer efficiency improvement method is proposed by optimizing the electrical potential distribution along the transfer path from the PPD to the FD. In this work, we present a non-uniform doped transfer transistor channel, with the adjustments to the overlap length between the CPIA layer and the transfer gate, and the overlap length between the SEN layer and transfer gate. Theory analysis and TCAD simulation results show that the density of the residual charge reduces from 1e11 /cm3 to 1e9 /cm3, and the transfer time reduces from 500 ns to 143 ns, and the charge transfer efficiency is about 77 e-/ns. This optimizing design effectively improves the charge transfer efficiency of 4T pixel and the performance of 4T high speed CMOS image sensor.
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Xiangliang Jin, Xiangliang Jin, Weihui Liu, Weihui Liu, Hongjiao Yang, Hongjiao Yang, Lizhen Tang, Lizhen Tang, Jia Yang, Jia Yang, } "Charge transfer efficiency improvement of 4T pixel for high speed CMOS image sensor", Proc. SPIE 9521, Selected Papers from Conferences of the Photoelectronic Technology Committee of the Chinese Society of Astronautics 2014, Part I, 95210B (4 March 2015); doi: 10.1117/12.2087262; https://doi.org/10.1117/12.2087262
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