Application technique used a delay line in APD array imaging system, such that each channel distance accuracy greatly improved. Echo signal by photoelectric conversion is completed by APD array detector, and designed by the impedance amplifier and other analog signal processing circuit. FPGA signal processing circuit is to complete the back-end processing, which is the timing function. FPGA array timer clock is to achieve coarse portion through timing, and delay line technique for measuring the length of time a non-integer multiple of the period of the laser pulse emission and the moment of reception, each stage of the delay units delay accuracy of sub ns magnitude, so as to achieve precision measuring part timers. With the above device was close imaging experiments, obtaining the 5 × 5 pixel imaging test results, presented to further improve system accuracy improved method.
You have requested a machine translation of selected content from our databases. This functionality is provided solely for your convenience and is in no way intended to replace human translation. Neither SPIE nor the owners and publishers of the content make, and they explicitly disclaim, any express or implied representations or warranties of any kind, including, without limitation, representations and warranties as to the functionality of the translation feature or the accuracy or completeness of the translations.
Translations are not retained in our system. Your use of this feature and the translations is subject to all use restrictions contained in the Terms and Conditions of Use of the SPIE website.