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23 October 2015 Automatic classification and defect verification based on inspection technology with lithography simulation
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Abstract
Even small defects on the main patterns can create killer defects on the wafer, whereas the same defect on or near the decorative patterns may be completely benign to the wafer functionality. This ambiguity often causes operators and engineers to put a mask "on hold" to be analyzed by an AIMS™ tool which slows the manufacturing time and increases mask cost. In order to streamline the process, mask shops need a reliable way to quickly identify the wafer impact of defects during mask inspection review reducing the number of defects requiring AIMS™ analysis.

Source Mask Optimization (SMO) techniques are now common on sub 20nm node critical reticle patterns These techniques create complex reticle patterns which often makes it difficult for inspection tool operators to identify the desired wafer pattern from the surrounding nonprinting patterns in advanced masks such as SMO, Inverse Lithography Technology (ILT), Negative Tone Development (NTD).

In this study, we have tested a system that generates aerial simulation images directly from the inspection tool images. The resulting defect dispositions from a program defect test mask along with numerous production mask defects have been compared to the dispositions attained from AIMS™ analysis. The results of our comparisons are presented, as well as the impact to mask shop productivity.
© (2015) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Masaya Kato, Hideki Inuzuka, Takeshi Kosuge, Shingo Yoshikawa, Kayoko Kanno, Hidemichi Imai, Hiroyuki Miyashita, Anthony Vacca, Peter Fiekowsky, and Dan Fiekowsky "Automatic classification and defect verification based on inspection technology with lithography simulation", Proc. SPIE 9635, Photomask Technology 2015, 96351W (23 October 2015); https://doi.org/10.1117/12.2197814
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