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4 September 2015 Patterning options for N7 logic: prospects and challenges for EUV
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Proceedings Volume 9661, 31st European Mask and Lithography Conference; 96610G (2015)
Event: 31st European Mask and Lithography Conference, 2015, Eindhoven, Netherlands
While the 10nm logic node is getting ready for High Volume Manufacturing, the industry has started to make the technology and design choices for the 7nm node. An important question for the industry is whether to make an irreversible choice for EUV, or to keep both EUV and ArFi multi-patterning as options. In the former case, it implies that the design rules of several critical layers will be such that the resulting 2D patterns can only be reliably imaged using EUV. In the latter case, the design rules result in 1D like patterns which are compatible with ArFi multiple patterning, either by application of cut-/block masks or by direct print. In this presentation we will compare the various patterning options by means of an edge placement error (EPE) based performance analysis. We will explain the advantages and considerations of an EPE budget compared to a traditional critical dimension uniformity (CDU) budget. The EPE analysis will be applied on imaging results using critical building blocks or constructs taken from 1D and 2D logic designs. These include cut mask, line-ends and 2D patterns. The trade-offs between the different designs in terms of imaging performance will be evaluated, showing the minimum pitch and tip-to-tip that can be supported based on the required EPE budget. In the end we will summarize the trade-offs for the N7 design choices based on the EPE assessment.
© (2015) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Eelco van Setten, Friso Wittebrood, Eleni Psara, Dorothe Oorschot, and Vicky Philipsen "Patterning options for N7 logic: prospects and challenges for EUV", Proc. SPIE 9661, 31st European Mask and Lithography Conference, 96610G (4 September 2015);


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