Ultra-thin oxide interlayer wafer bonding for heterogeneous III-V/Si photonics integration

Chee-Wei Lee; Ying Shun Liang; Doris Keh-Ting Ng; Yi Yang; Hnin Yu Yu Ko; Qian Wang

doi:10.1117/12.2218598

3 March 2016 Ultra-thin oxide interlayer wafer bonding for heterogeneous III-V/Si photonics integration

Chee-Wei Lee, Ying Shun Liang, Doris Keh-Ting Ng, Yi Yang, Hnin Yu Yu Ko, Qian Wang

Author Affiliations +

Proceedings Volume 9751, Smart Photonic and Optoelectronic Integrated Circuits XVIII; 97510G (2016) https://doi.org/10.1117/12.2218598
Event: SPIE OPTO, 2016, San Francisco, California, United States

Abstract

We report a low-temperature (220°C) covalent bonding of InP-based epitaxy substrate to silicon substrate through a thin thermal oxide interlayer of around 20 nm. Our SiO₂ interlayer is grown only on the silicon substrate, which avoids the challenge in obtaining high quality SiO₂ film on III-V substrate. The 20 nm thin oxide is proved to be sufficient as the outgassing medium during the bonding process. It is found that the bonding has minimal effect on the transferred epitaxy layer. This is evident from the X-ray Diffraction and room temperature photoluminescence (PL) characterizations of the III-V sample before (as-grown) and after bonding, where no significant peak shifting or broadening is observed. The high resolution Transmission Electron Micrograph (HR-TEM) also reveals almost zero-defect atomic bonding between III-V and thermal oxide on silicon.

Citation Download Citation

Chee-Wei Lee, Ying Shun Liang, Doris Keh-Ting Ng, Yi Yang, Hnin Yu Yu Ko, and Qian Wang "Ultra-thin oxide interlayer wafer bonding for heterogeneous III-V/Si photonics integration", Proc. SPIE 9751, Smart Photonic and Optoelectronic Integrated Circuits XVIII, 97510G (3 March 2016); https://doi.org/10.1117/12.2218598

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