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14 March 2016 CMOS-compatible polarization rotator design based on asymmetrical periodic loaded waveguide structure
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Proceedings Volume 9752, Silicon Photonics XI; 97520A (2016)
Event: SPIE OPTO, 2016, San Francisco, California, United States
Silicon-on-insulator (SOI) technology has been a promising platform for photonic applications. However, the high index-contrast between silicon and the top cladding (SiO2 or air) of the SOI waveguides makes the modal birefringence hard to control. Consequently, SOI based photonics integrated circuits (PICs) are in general highly polarization-sensitive, making polarization management important. In this paper, a polarization rotator (PR) design on the 220 nm SOI platform is demonstrated through numerical simulations and experiments. The demonstrated PR design is based on asymmetrical periodic loaded waveguide structures. The demonstrated design features compact device footprint and can be fabricated by CMOS compatible process. In addition, no special cladding is required to break the vertical symmetry of the waveguide. The design has shown promising performance over the C-band wavelengths (1530 nm-1565 nm) by simulations. However, the fabrication requirements are stringent for the design, thus the performance of the fabricated devices are limited by the current fabrication technology.
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Yao Sun and Winnie N. Ye "CMOS-compatible polarization rotator design based on asymmetrical periodic loaded waveguide structure", Proc. SPIE 9752, Silicon Photonics XI, 97520A (14 March 2016);

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