21 March 2016 100 Gb/s photoreceiver module based on 4ch × 25 Gb/s vertical-illumination-type Ge-on-Si photodetectors and amplifier circuits
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Proceedings Volume 9752, Silicon Photonics XI; 97520G (2016) https://doi.org/10.1117/12.2212740
Event: SPIE OPTO, 2016, San Francisco, California, United States
Abstract
We present the performance of 4-channel × 25 Gb/s all-silicon photonic receivers based on hybrid-integrated vertical Ge-on-bulk-silicon photodetectors with 65nm bulk CMOS front-end circuits, characterized over 100 Gb/s. The sensitivity of a single-channel Ge photoreceiver module at a BER = 10-12 was measured -11 dBm at 25 Gb/s, whereas, the measured sensitivity of a 4-ch Ge photoreceiver was -10.06 ~ -10.9 dBm for 25Gb/s operation of each channel, and further improvement is in progress. For comparison, we will also present the performance of a 4-ch × 25 Gb/s photoreceiver module, where commercial InP HBT-based front-end circuits is used, characterized up to 100 Gb/s.
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Jiho Joo, Jiho Joo, Ki-Seok Jang, Ki-Seok Jang, Sanghoon Kim, Sanghoon Kim, In Gyoo Kim, In Gyoo Kim, Jin Hyuk Oh, Jin Hyuk Oh, Sun Ae Kim, Sun Ae Kim, Gyungock Kim, Gyungock Kim, Gyu-Seob Jeong, Gyu-Seob Jeong, Hankyu Chi, Hankyu Chi, Deog-Kyoon Jeong, Deog-Kyoon Jeong, "100 Gb/s photoreceiver module based on 4ch × 25 Gb/s vertical-illumination-type Ge-on-Si photodetectors and amplifier circuits", Proc. SPIE 9752, Silicon Photonics XI, 97520G (21 March 2016); doi: 10.1117/12.2212740; https://doi.org/10.1117/12.2212740
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