15 March 2016 Low-power chip-level optical interconnects based on bulk-silicon single-chip photonic transceivers
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Proceedings Volume 9753, Optical Interconnects XVI; 975315 (2016) https://doi.org/10.1117/12.2212465
Event: SPIE OPTO, 2016, San Francisco, California, United States
Abstract
We present new scheme for chip-level photonic I/Os, based on monolithically integrated vertical photonic devices on bulk silicon, which increases the integration level of PICs to a complete photonic transceiver (TRx) including chip-level light source. A prototype of the single-chip photonic TRx based on a bulk silicon substrate demonstrated 20 Gb/s low power chip-level optical interconnects between fabricated chips, proving that this scheme can offer compact low-cost chip-level I/O solutions and have a significant impact on practical electronic-photonic integration in high performance computers (HPC), cpu-memory interface, 3D-IC, and LAN/SAN/data-center and network applications.
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Gyungock Kim, Hyundai Park, Jiho Joo, Ki-Seok Jang, Myung-Joon Kwack, Sanghoon Kim, In Gyoo Kim, Sun Ae Kim, Jin Hyuk Oh, Jaegyu Park, Sanggi Kim, "Low-power chip-level optical interconnects based on bulk-silicon single-chip photonic transceivers", Proc. SPIE 9753, Optical Interconnects XVI, 975315 (15 March 2016); doi: 10.1117/12.2212465; https://doi.org/10.1117/12.2212465
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