25 March 2016 CD bias control on hole pattern
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Abstract
Gridded design rules[1] is major process in configuring logic circuit used 193-immersion lithography. In the scaling of grid patterning, we can make 10nm order line and space pattern by using multiple patterning techniques such as self-aligned multiple patterning (SAMP) and litho-etch- litho-etch (LELE)[2][3][5] . On the other hand, Line cut process has some error parameters such as pattern defect, placement error, roughness and X-Y CD bias with the decreasing scale. Especially roughness and X-Y CD bias are paid attention because it cause cut error and pattern defect. In this case, we applied some smoothing process to care hole roughness[4]. Each smoothing process showed different effect on X-Y CD bias. In this paper, we will report the pattern controllability comparison of trench and block + inverse. It include X-Y CD bias, roughness and process usability. Furthermore we will discuss optimum method focused on X-Y CD bias when we use additional process such as smoothing and shrink etching .
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Kyohei Koike, Kyohei Koike, Arisa Hara, Arisa Hara, Sakurako Natori, Sakurako Natori, Shohei Yamauchi, Shohei Yamauchi, Masatoshi Yamato, Masatoshi Yamato, Kenichi Oyama, Kenichi Oyama, Hidetami Yaegashi, Hidetami Yaegashi, "CD bias control on hole pattern", Proc. SPIE 9779, Advances in Patterning Materials and Processes XXXIII, 97790V (25 March 2016); doi: 10.1117/12.2218961; https://doi.org/10.1117/12.2218961
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