16 March 2016 Migrating from older to newer technology nodes and discovering the process weak-points
Author Affiliations +
As technology moves towards more advanced nodes, the complexity of VLSI designs continues to grow and unexpected designs in physical layout push the process limits. In the beginning of a new technology node development there are not enough real design chips with complex structures and it is hard for foundries to comprehensively verify their process capabilities. It is necessary for foundries to generate a comprehensive set of test patterns to co-optimize the design rule manual (DRM) and manufacturing process. Furthermore, as the technology goes into an accelerated yield ramp phase, we need to find the potential process weak-points and identify the gaps between the design rules and the process.

This paper will present a novel methodology to enumerate initial test patterns based on other technology node products. With this novel methodology, DRM development and process capability verification can be sped up rapidly in comparison to a more traditional way. At the same time, the process weak-point signatures can be migrated from the older technology nodes to the new technology node for verification. This methodology will help foundries catch process detractor patterns at new technology early development stage.
© (2016) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Linda Zhuang, Linda Zhuang, Jenny Pang, Jenny Pang, Jessy Xu, Jessy Xu, MengFeng Tsai, MengFeng Tsai, Xue Long Shi, Xue Long Shi, Qing Wei Liu, Qing Wei Liu, Ellyn Yang, Ellyn Yang, Yifan Zhang, Yifan Zhang, Jason Sweis, Jason Sweis, Ya-Chieh Lai, Ya-Chieh Lai, Hua Ding, Hua Ding, "Migrating from older to newer technology nodes and discovering the process weak-points", Proc. SPIE 9781, Design-Process-Technology Co-optimization for Manufacturability X, 97810L (16 March 2016); doi: 10.1117/12.2219561; https://doi.org/10.1117/12.2219561

Back to Top