16 March 2016 Interlayer design verification methodology using contour image
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Abstract
Memory industry has been pursuing endless shrinking technology which increases fabrication complexity. It poses problems between adjacent layers as well as within a single layer. To verify the interlayer design, we have developed the interlayer design verification methodology using contour image. Our methodology makes it possible to verify interlayer design visually by extracting the contour image from the real patterns. And we can verify interlayer design even during the fabrication process and conduct a non-destructive inspection. Also this methodology provides a statistical analysis of massive measured data. Through this methodology, we can calculate the margin of current interlayer design and suggest the requirement of design.
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Minyoung Shim, Minyoung Shim, Seoksan Kim, Seoksan Kim, Sungmin Park, Sungmin Park, Seiryung Choi, Seiryung Choi, Namjung Kang, Namjung Kang, Hyunju Sung, Hyunju Sung, Jinwoo Choi, Jinwoo Choi, Jaepil Shin, Jaepil Shin, Jaekyun Park, Jaekyun Park, Myoungseob Shim, Myoungseob Shim, Hyeongsun Hong, Hyeongsun Hong, Kyupil Lee, Kyupil Lee, } "Interlayer design verification methodology using contour image", Proc. SPIE 9781, Design-Process-Technology Co-optimization for Manufacturability X, 97810V (16 March 2016); doi: 10.1117/12.2218477; https://doi.org/10.1117/12.2218477
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