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Plasma etching processes for the integration of InP based compounds on 200mm Si wafer for photonic applications
Self-aligned quadruple patterning integration using spacer on spacer pitch splitting at the resist level for sub-32nm pitch applications
Edge roughness characterization of advanced patterning processes using power spectral density analysis (PSD)
Reactive ion etching challenges for half-pitch sub-10-nm line-and-space pattern fabrication using directed self-assembly lithography
LER improvement for sub-32nm pitch self-aligned quadruple patterning (SAQP) at back end of line (BEOL)