1 April 2016 Self-aligned quadruple patterning integration using spacer on spacer pitch splitting at the resist level for sub-32nm pitch applications
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Abstract
Multiple patterning integrations for sub 193nm lithographic resolution are becoming increasingly creative in pursuit of cost reduction and achieving desired critical dimension. Implementing these schemes into production can be a challenge. Aimed at reducing cost associated with multiple patterning for the 10nm node and beyond, we will present a self-aligned quadruple patterning strategy which uses 193nm immersion lithography resist pattern as a first mandrel and a spacer on spacer integration to enable a final pitch of 30nm. This option could be implemented for front end or back end critical layers such as Fin and Mx. Investigation of combinations of low temperature ALD films such as TiO, Al2O3 and SiO2 will be reviewed to determine the best candidates to meet the required selectivities, LER/LWR and CDs.
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Angélique Raley, Angélique Raley, Sophie Thibaut, Sophie Thibaut, Nihar Mohanty, Nihar Mohanty, Kal Subhadeep, Kal Subhadeep, Satoru Nakamura, Satoru Nakamura, Akiteru Ko, Akiteru Ko, David O'Meara, David O'Meara, Kandabara Tapily, Kandabara Tapily, Steve Consiglio, Steve Consiglio, Peter Biolsi, Peter Biolsi, "Self-aligned quadruple patterning integration using spacer on spacer pitch splitting at the resist level for sub-32nm pitch applications", Proc. SPIE 9782, Advanced Etch Technology for Nanopatterning V, 97820F (1 April 2016); doi: 10.1117/12.2219321; https://doi.org/10.1117/12.2219321
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