Paper
14 December 2015 A real-time FPGA-based architecture for OpenSURF
Author Affiliations +
Proceedings Volume 9813, MIPPR 2015: Pattern Recognition and Computer Vision; 98130K (2015) https://doi.org/10.1117/12.2205633
Event: Ninth International Symposium on Multispectral Image Processing and Pattern Recognition (MIPPR2015), 2015, Enshi, China
Abstract
This paper proposes a low-cost FPGA architecture of Speed-Up Robust Features (SURF) algorithm based on OpenSURF. It optimizes the computing architecture for the steps of feature detection and feature description involved in SURF to reduce the resource utilization and improve processing speed. As a result, this architecture can detect feature and extract descriptor from video streams of 800x600 resolutions at 60 frames per second (60fps). Extensive experiments have demonstrated its efficiency and effectiveness.
© (2015) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Chaoxiu Chen, Huang Yong, Sheng Zhong, and Luxin Yan "A real-time FPGA-based architecture for OpenSURF", Proc. SPIE 9813, MIPPR 2015: Pattern Recognition and Computer Vision, 98130K (14 December 2015); https://doi.org/10.1117/12.2205633
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Cited by 2 scholarly publications.
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KEYWORDS
Wavelets

Field programmable gate arrays

Image storage

Clocks

Feature extraction

Video

Data storage

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