19 May 2016 Real-time fetal ECG system design using embedded microprocessors
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Abstract
The emphasis of this project lies in the development and evaluation of new robust and high fidelity fetal electrocardiogram (FECG) systems to determine the fetal heart rate (FHR). Recently several powerful algorithms have been suggested to improve the FECG fidelity. Until now it is unknown if these algorithms allow a real-time processing, can be used in mobile systems (low power), and which algorithm produces the best error rate for a given system configuration. In this work we have developed high performance, low power microprocessor-based biomedical systems that allow a fair comparison of proposed, state-of-the-art FECG algorithms. We will evaluate different soft-core microprocessors and compare these solutions to other commercial off-the-shelf (COTS) hardcore solutions in terms of price, size, power, and speed.
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Uwe Meyer-Baese, Harikrishna Muddu, Sebastian Schinhaerl, Martin Kumm, Peter Zipf, "Real-time fetal ECG system design using embedded microprocessors", Proc. SPIE 9871, Sensing and Analysis Technologies for Biomedical and Cognitive Applications 2016, 987106 (19 May 2016); doi: 10.1117/12.2224256; https://doi.org/10.1117/12.2224256
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