5 October 2016 The study of CD side to side error in line/space pattern caused by post-exposure bake effect
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Abstract
In semiconductor manufacturing, as the design rule has decreased, the ITRS roadmap requires crucial tighter critical dimension (CD) control. CD uniformity is one of the necessary parameters to assure good performance and reliable functionality of any integrated circuit (IC) [1] [2], and towards the advanced technology nodes, it is a challenge to control CD uniformity well. The study of corresponding CD Uniformity by tuning Post-Exposure bake (PEB) and develop process has some significant progress[3], but CD side to side error happening to some line/space pattern are still found in practical application, and the error has approached to over the uniformity tolerance. After details analysis, even though use several developer types, the CD side to side error has not been found significant relationship to the developing. In addition, it is impossible to correct the CD side to side error by electron beam correction as such error does not appear in all Line/Space pattern masks. In this paper the root cause of CD side to side error is analyzed and the PEB module process are optimized as a main factor for improvement of CD side to side error.
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Jin Huang, Eric Guo, Haiming Ge, Max Lu, Yijun Wu, Mingjing Tian, Shichuan Yan, Ran Wang, "The study of CD side to side error in line/space pattern caused by post-exposure bake effect", Proc. SPIE 9985, Photomask Technology 2016, 99851N (5 October 2016); doi: 10.1117/12.2241277; https://doi.org/10.1117/12.2241277
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