5 October 2016 High-performance fabrication process for 2xnm hole-NIL template production
Author Affiliations +
UV nano imprint lithography (UV-NIL) has high-throughput and cost-effective for complex nano-scale patterns and is considered as a candidate for next generation lithography tool. In addition, NIL is the unmagnified lithography and contact transfer technique using template. Therefore, the lithography performance depends greatly on the quality of the template pattern. According to ITRS 2013, the minimum half pitch size of Line and Space (LS) pattern will reach 1x nm level within next five years. On the other hand, in hole pattern, half pith of 2x nm level will be required in five years. Pattern shrink rate of hole pattern size is slower than LS pattern, but shot counts increase explosively compared to LS pattern due to its data volume. Therefore, high throughput and high resolution EB lithography process is required. In previous study, we reported the result of hole patterning on master template which has high resolution resist material and etching process. This study indicated the potential for fabricating 2xnm hole master template [1]. After above study, we aim at fabricating the good quality of 2xnm master template which is assured about defect, CD uniformity(CDU), and Image placement(IP). To product high quality master template, we develop not only high resolution patterning process but also high accuracy quality assurance technology. We report the development progress about hole master template production.
© (2016) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Keisuke Yagawa, Machiko Suenaga, Takeharu Motokawa, Mana Tanabe, Akihiko Ando, Eiji Yamanaka, Keiko Morishita, Shingo Kanamitsu, Masato Saito, Masamitsu Itoh, "High-performance fabrication process for 2xnm hole-NIL template production", Proc. SPIE 9985, Photomask Technology 2016, 99852E (5 October 2016); doi: 10.1117/12.2243575; https://doi.org/10.1117/12.2243575


Anti-spacer double patterning
Proceedings of SPIE (March 27 2014)
Mesh patterning process for 40nm contact hole
Proceedings of SPIE (March 30 2010)
Mask specification guidelines in spacer patterning technology
Proceedings of SPIE (December 04 2008)
Double patterning process with freezing technique
Proceedings of SPIE (April 01 2009)

Back to Top