Double Exposure and Double Patterning
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Abstract
193-nm water immersion can provide lithographic solutions as far as the 45-nm half-pitch node. Double exposure and double patterning have emerged as leading candidates to fill the technology gap between water immersion and EUV lithography. Early test results have demonstrated that key technical challenges to double patterning, such as tight overlap requirements and strict CD control, are being solved, while novel materials for double exposure are being quickly developed. It is widely believed that double exposure and double patterning can provide viable patterning solutions to the 32-nm half-pitch node, with possible extensions to the 22-nm node. This chapter covers various approaches of double exposure and double patterning. At the time of this writing (Fall 2008), double exposure and double patterning are undergoing rapid growth and many new approaches are being explored. Although this chapter is as comprehensive as possible, an exhaustive list is not practical. 9.1 Introduction 9.1.1 Double exposure (DE) Double exposure (DE) refers to exposing the resist-coated wafer twice to create one resist pattern. No etching process is used between the two exposures. Two process approaches for DE have been explored: A. Two exposures of the same resist using different masks. After the two exposures, the wafer is sent to PEB and development. The process flow is abbreviated as Resist 1 / Exposure 1 / Exposure 2. B. Two separate exposure/develop processes using different masks. The process flow is abbreviated as Resist 1 / Exposure 1 / Develop 1 / Resist 2 / Exposure 2 / Develop 2. Some additional processes may be applied somewhere between steps to “freeze” the 1st resist pattern so that it can withstand the 2nd lithographic process.
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CITATIONS
Cited by 6 scholarly publications.
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KEYWORDS
Double patterning technology

Photoresist processing

Lithography

Photomasks

Semiconducting wafers

Etching

Extreme ultraviolet lithography

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