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Chapter 18:
Introduction to Digital Data Signals and Design Constraints
The goal of this chapter is to provide digital designers of FTTx transceivers with basic system fundamentals. The design limitations and impairments determine the component specifications. Such parameters are generally bit error rate (BER) and its degradation due to extinction ratio (ER) trade-offs, mode-partition noise, jitter, and relative intensity noise (RIN). In this chapter, these parameters are presented first. The next section deals with digital transport through analog networks such as ladder filter and receiver control field (RFC) coils. The goal here is to explain how the pseudo-random bit sequence (PRBS) signal is affected by the dispersion of these elements in the aspect of pattern dependent jitter. Fiber impairments were already dealt with in Chapter 17; so both sides, electronics and optics, are covered. Digital formats such as nonreturn to zero (NRZ), Manchester, and return to zero (RZ) are briefly reviewed. In this background, the clock-and data-recovery (CDR) concept is explained. Additional information about amplitude control loops needed for digital transceivers, which are critical in burst mode, is provided in Chapters 12 and 13. In Chapter 12, the foundation in control theory for CDR is provided and phase locked loops (PLL) are discussed. Burst-mode automatic-gain control (AGC) techniques are explained in Chapter 19. A basic theory is provided here about CDR operation, which is a PLL. This information is important to understand the limitations of fast synchronization and acquisition in burst-mode operation. Trade-offs between CDR with a low-jitter transfer function and fast acquisition are also discussed. This review is a prerequisite one must have prior to starting basic design of any digital transceiver.
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