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Chapter 11:
Hardware Architecture for Image Processing
Book: Electronic Imaging Technology
Editor(s): Edward R. Dougherty
Author(s): Sinha, Divyendu, CUNY/City College of Staten Island
Published: 1999
https://doi.org/10.1117/3.2570046.ch11
Abstract
In this chapter we consider computer hardware architectures that have been utilized in commercially available CPUs to speed execution. Practical image processing is computer-system dependent and achieving efficient implementation depends on an understanding of the computational environment, whether to take advantage of features within an existing system, to augment that system with additional hardware or peripherals, to network the system, or to purchase a new system more suitable to the task at hand. In real­time environments, appropriate computational hardware is essential. In addition to general issues concerning parallel processing, the chapter treats in detail pipelining for instructions and convolution, multiple-processor systems and scheduling, and two commercial image processing systems. The commercial systems have been chosen to illustrate the capabilities available in today's market while at the same time presenting two different architectures. It is assumed that the reader is familiar with the basics of sequential computing and image processing.
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CHAPTER 11
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