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Chapter 1:
Monolithic and Heterogeneous Optoelectronic Integration: The Epitaxy-on-Electronics, Silicon-on-Gallium-Arsenide, and Aligned-Pillar-Bonding Techniques
Before optoelectronic integrated circuits and systems can be produced in high volumes and at low cost it will be necessary to develop for them monolithic integration techniques which can be executed on full wafers and in multiwafer lots. Monolithic processes are also essential to achieving the highest speed and performance from optoelectronic integrated circuits (OEICs) and to insuring robustness and high mechanical reliability. Hybrid techniques can satisfy many near-term needs for OEICs, but they involve a great deal of piecework and assembly, thereby increasing costs, introducing performance-limiting parasitics, and decreasing ruggedness. It is monolithic, full-wafer, batch-level processing of OEICs that must be the ultimate goal of any program promoting the commercial use of optoelectronics to solve problems in computation, signal processing, data analysis, and sensing. This is the hypothesis of our program and the focus of this review.
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