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Chapter 2:
Multiple-Exposure-Patterning-Enhanced Digital Logic Design
Abstract
To provide a very rudimentary level of design insight as part of the overall DTCO discussion, this section reviews the primary elements of a digital standard-cell design flow. Of course, a complete system-on-chip (SoC) design contains many more design elements in addition to auto-routed digital logic blocks: memory blocks, analog circuits, I/O designs, and e-fuses, to name a few. Each undergoes DTCO negotiations in a very similar fashion to the elements of the digital-logic-design flow and will be discussed in more detail in Section 3.6.1.
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CHAPTER 2
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