Overlay errors can be considered in terms of a hierarchy (Fig. 5.1). Most fundamental are those errors which occur when only a single stepper and ideal substrates are used, and where the latter provide high signal-to-noise alignment signals. This basic set of overlay errors is well described by overlay models, which will be discussed in detail shortly. When more than a single stepper is used, an additional set of overlay errors is introduced, referred to as matching errors. Finally, there are process-specific contributions to overlay that can result in non-ideal alignment targets. A full accounting of overlay errors in terms of a hierarchy is useful for assessing and improving overlay.
The control of overlay requires the use of models, because these models are employed directly in the software of wafer steppers when aligning wafers, and the model parameters are changed when adjustments are made to wafer steppers. Overlay models conform to the physics of wafer steppers.
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