1 January 1992 High-quality image processing architecture for facsimiles
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J. of Electronic Imaging, 1(1), (1992). doi:10.1117/12.55179
Abstract
A total and coherent image processing architecture for G3/G4/ISDN facsimiles is proposed that features high-quality multi-level processing by means of correlative area scanning and a software-oriented processing architecture. This image processing LSI controller includes a resolution converter and error diffusion halftone processing circuits in 4000 gates. A semi-superfine scanning mode is evaluated, which will be adopted as a new CCITT G3 optional mode.
Keisuke Nakashima, Shin'ichi Shinoda, Yasuyuki Kojima, Yasuro Hori, Toshiaki Nakamura, Noboru Suemori, "High-quality image processing architecture for facsimiles," Journal of Electronic Imaging 1(1), (1 January 1992). http://dx.doi.org/10.1117/12.55179
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KEYWORDS
Image processing

Image enhancement

Image segmentation

Diffusion

Printing

Signal processing

Halftones

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