11 January 2017 Full image-processing pipeline in field-programmable gate array for a small endoscopic camera
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Abstract
Endoscopy is an imaging procedure used for diagnosis as well as for some surgical purposes. The camera used for the endoscopy should be small and able to produce a good quality image or video, to reduce discomfort of the patients, and to increase the efficiency of the medical team. To achieve these fundamental goals, a small endoscopy camera with a footprint of 1    mm × 1    mm × 1.65    mm is used. Due to the physical properties of the sensors and human vision system limitations, different image-processing algorithms, such as noise reduction, demosaicking, and gamma correction, among others, are needed to faithfully reproduce the image or video. A full image-processing pipeline is implemented using a field-programmable gate array (FPGA) to accomplish a high frame rate of 60 fps with minimum processing delay. Along with this, a viewer has also been developed to display and control the image-processing pipeline. The control and data transfer are done by a USB 3.0 end point in the computer. The full developed system achieves real-time processing of the image and fits in a Xilinx Spartan-6LX150 FPGA.
Sheikh Shanawaz Mostafa, Sheikh Shanawaz Mostafa, L. Natércia Sousa, L. Natércia Sousa, Nuno Fábio Ferreira, Nuno Fábio Ferreira, Ricardo M. Sousa, Ricardo M. Sousa, Joao Santos, Joao Santos, Martin Wäny, Martin Wäny, F. Morgado-Dias, F. Morgado-Dias, } "Full image-processing pipeline in field-programmable gate array for a small endoscopic camera," Journal of Electronic Imaging 26(1), 013005 (11 January 2017). https://doi.org/10.1117/1.JEI.26.1.013005 . Submission: Received: 23 June 2016; Accepted: 13 December 2016
Received: 23 June 2016; Accepted: 13 December 2016; Published: 11 January 2017
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