1 October 2002 Investigation of the physical and practical limits of dense-only phase shift lithography for circuit feature definition
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Abstract
The rise of low-k1 optical lithography in integrated circuit manufacturing has introduced new questions concerning the physical and practical limits of particular subwavelength resolution-enhanced imaging approaches. For a given application, trade-offs between mask complexity, design cycle time, process latitude and process throughput must be well understood. It has recently been shown that a dense-only phase shifting mask (PSM) approach can be applied to technology nodes approaching the physical limits of strong PSM with no proximity effects. Such an approach offers the benefits of reduced mask complexity and design cycle time, at the expense of decreased process throughput and limited design flexibility. In particular, dense-only methods offer k1<0.3, thus enabling 90 nm node lithography with high-numerical aperture 248 nm exposure systems. We present the results of experiments, simulations, and analysis designed to explore the trade-offs inherent in dense-only phase shift lithography. Gate and contact patterns corresponding to various fully scaled circuits are presented, and the relationship between process complexity and design latitude is discussed. Particular attention is given to approaches for obtaining gate features in both the horizontal and vertical orientation. Since semiconductor investment is dependent on cost amortization, the applicability of these methods is also considered in terms of production volume.
Brian Tyrrell, Michael Fritze, David K. Astolfi, Renee D. Mallen, Bruce Wheeler, Peter D. Rhyins, Patrick M. Martin, "Investigation of the physical and practical limits of dense-only phase shift lithography for circuit feature definition," Journal of Micro/Nanolithography, MEMS, and MOEMS 1(3), (1 October 2002). https://doi.org/10.1117/1.1503349
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