1 July 2011 Technology review and assessment of nanoimprint lithography for semiconductor and patterned media manufacturing
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Abstract
The semiconductor and hard disk drive industries are investigating nanoimprint for future high volume manufacturing of memory devices and patterned media. Nanoimprint, a form of 1× contact lithography, is one of the few technologies capable of meeting the resolution requirements for next generation electronic and storage devices. Its ability to produce small features with low line width roughness and critical dimension uniformity has been demonstrated by multiple sources. Significant improvements in defectivity have been shown; overlay has improved to within a factor of 2 of that required by the International Technology Roadmap for Semiconductors for 22 nm node flash memory devices; and next generation tools, templates, and processes are being commercialized and tested at end-user sites. Defectivity, throughput, and infrastructure remain as critical challenges, but each has experienced marked improvements in the past year. This technology review and assessment covers critical aspects of nanoimprint for both semiconductor and patterned media manufacturing. It focuses on jet and flash imprint lithography, the type of nanoimprint most often considered for these two applications. The requirements and current status of nanoimprint with respect to high volume manufacturing are presented, and critical aspects are discussed.
© (2011) Society of Photo-Optical Instrumentation Engineers (SPIE)
Matt Malloy, Matt Malloy, Lloyd C. Litt, Lloyd C. Litt, } "Technology review and assessment of nanoimprint lithography for semiconductor and patterned media manufacturing," Journal of Micro/Nanolithography, MEMS, and MOEMS 10(3), 032001 (1 July 2011). https://doi.org/10.1117/1.3642641 . Submission:
JOURNAL ARTICLE
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