2 August 2013 Electron multibeam technology for mask and wafer writing at 0.1 nm address grid
Author Affiliations +
J. of Micro/Nanolithography, MEMS, and MOEMS, 12(3), 031108 (2013). doi:10.1117/1.JMM.12.3.031108
IMS Nanofabrication realized a 50 keV electron multibeam proof-of-concept (POC) tool confirming writing principles with 0.1 nm address grid and lithography performance capability. The POC system achieves the predicted 5 nm 1 sigma blur across the 82  μm×82  μm array of 512×512 (262,144) programmable 20 nm beams. 24-nm half pitch (HP) has been demonstrated and complex patterns have been written in scanning stripe exposure mode. The first production worthy system for the 11-nm HP mask node is scheduled for 2014 (Alpha), 2015 (Beta), and first-generation high-volume manufacturing multibeam mask writer (MBMW) tools in 2016. In these MBMW systems the max beam current through the column is 1 μA. The new architecture has also the potential for 1× mask (master template) writing. Substantial further developments are needed for maskless e-beam direct write (EBDW) applications as a beam current of <;2  mA is needed to achieve 100 wafer per hour industrial targets for 300 mm wafer size. Necessary productivity enhancements of more than three orders of magnitude are only possible by shrinking the multibeam optics such that 50 to 100 subcolumns can be placed on the area of a 300 mm wafer and by clustering 10 to 20 multicolumn tools. An overview of current EBDW efforts is provided.
Platzgummer, Klein, and Loeschner: Electron multibeam technology for mask and wafer writing at 0.1 nm address grid



There is increased industrial interest and demand for electron beam lithography (EBL) in order to provide (1) a fast multibeam mask writer (MBMW) for the realization of leading-edge 4× masks1 and 1× templates2 and (2) maskless electron beam direct write (EBDW) on 300 and 450 mm wafers,3 in particular for cutting lithography.4,5

For mask writing, 50 keV single variable-shaped beam (VSB) writing tools are available with a current density as high as 400A/cm2 (Ref. 6), providing ca. 0.1 μA average current. For sub-14-nm half pitch (HP) mask technology nodes, however, single VSB technology cannot keep up with the exponential growth of shot numbers at substantial reduced average shot size.7 Further, there is the need to enhance the resist exposure dose by a factor of 5 to 10 up to 100μC/cm2 in order to ensure sufficiently low line edge and line width roughness.7,8

There are several proposals on how to realize a break-through multibeam (MB) column solution that can provide 10× to 40× more beam current than the most advanced VSB tools (Fig. 1): (1) A slim (ca. 20 mm diameter) column providing a fixed-shape beam as proposed by Multibeam Corporation for complementary electron beam lithography with the argument that cutting needs to be done on 5% of the 300 mm wafer area and a single beam shape is sufficient.9 (2) A multicolumn cell approach as pursued by Advantest using VSB combined with character projection in each cell to improve throughput.10 (3) A multiple (variable-) shaped beam column as proposed by Vistec.11 (4) The IMS Nanofabrication column with a blanking device and projection optics with 200× reduction.12 (5) A reflective electron beam lithography (REBL) configuration as pursued by KLA-Tencor.13

Fig. 1

Overview of proposed multibeam configurations. (a) SB: spot beam, (b) VSB: variable shaped beam, (c) CEBL: complementary electron beam lithography, (d) MCC: multi-column cell, (e) MSB: multiple variable shaped beam, (f) eMET: electron mask exposure tool; PML2: projection mask-less lithography, (g) REBL: reflective electron beam lithography, and (h) MAPPER: genuine name.


In order to reach an electron beam current of >2mA beam current as needed is for 100 wafer per hour (WPH) EBDW, an additional productivity enhancement by more than three orders of magnitude is needed as shown in Fig. 2. First, a 1 to 4 μA MB column needs to be shaped sufficiently small so that 50 to 100 columns can be placed on the area of a 300 mm wafer and thus ca. 200 μA beam current can be achieved. Second, 10 to 20 multicolumn tools need to be clustered to realize the targeted >2mA total beam current required for 100 WPH EBDW.

Fig. 2

Evolution of electron beam systems as needed to realize 100 WPH EBDW.


For REBL, there is the KLA-Tencor proposal13 to realize a multicolumn tool configuration with 36 columns exposing six wafers in parallel, and to cluster such tools to reach the 100 WPH EBDW target (Fig. 3). In the MAPPER approach, there is the target to realize 13,200 microcolumns within an area of 26mm×26mm and to have 49 programmable beams within each microcolumn, which hit the wafer substrate at 5 keV beam energy.14 With each microcolumn providing 13 nA, the targeted multi-microcolumn tool current is ca. 170 μA. There is the target to cluster 10 microcolumn tools to reach 1.7 mA beam current.

Fig. 3

Schematics of REBL, PML2, and MAPPER multicolumn/cluster tool configurations.


It should be pointed out that presently all efforts cited above are concentrated on realizing a break-through MB column, i.e., to demonstrate writing performance with 1 to 4 μA total beam current.

For leading-edge mask exposures, already 1 μA beam current is sufficient to meet the industrial needs of realizing 10 h write time even when using a resist with an exposure dose of 100μC/cm2.8 Therefore, IMS Nanofabrication concentrates efforts on development and realization of a multibeam mask writer called electron mask exposure tool (eMET). A proof-of-concept tool (eMET POC) was realized in 2011 (Ref. 8) with extensive testing throughout 2012.1516.17


eMET Principles and Realized Proof-of-Concept Tool

The basic principles common to all eMET systems are shown in Fig. 4. Electrons are extracted at gun-level first pass through a multielectrode stack, which acts as a condenser and generates a broad, homogeneous beam of ca. 25 mm in diameter. This electron beam then impinges perpendicularly onto a programmable aperture plate system (APS), where 512×512 (262,144) micrometer-sized beams are formed (cf. 256 k-APS). Additionally, each beam can be deflected individually by CMOS-controlled microdeflectors. All beams (deflected and undeflected) then enter the projection optics of the system where they get accelerated from 5 to 50 keV beam energy in an electrostatic multielectrode lens and 200× demagnified by a magnetic lens system located at the bottom of the optical column. Only undeflected beams make it to the substrate level. Deflected beams are filtered out at a stopping aperture plate in the projection optics. All eMET systems are designed to print 82-μm-wide stripes on-the-fly, i.e., the substrate is continuously moving at constant velocity underneath the column while beams are switched on and off according to the data fed into the APS via the eMET data path. In this write mode, IMS’s proprietary writing strategy provides an inherent redundancy of up to 16×. This high redundancy level averages out the effects of individual defective beams and thereby allows ignoring up to 100 (statistically distributed) defective beams. Furthermore, the operability of APS units is monitored in situ on a weekly basis by measurements that give information on the precise position of all defective beams. This information can be used to further reduce the impact of defective beams via online correction in the eMET data path. This inherent property of the eMET writing strategy coupled with the online correction capability drastically reduces the technical risk associated with the most critical element of this new technology and speaks for the suitability of IMS’s MB solution for high-volume manufacturing (HVM).

Fig. 4

eMET principles.


In 2011 a first POC version—the eMET POC—was integrated and finalized based on a tight schedule. The eMET POC column was designed from scratch to meet all lithographic requirements of the 11-nm HP node such as resolution capability (i.e., minimum feature size), pattern fidelity, critical dimension uniformity (CDU), line width roughness (LWR), registration, etc., within 1cm×1cm fields on 6 in. mask blanks. The fully integrated eMET POC during 2012 factory acceptance tests at IMS Nanofabrication in Vienna, Austria, can be seen in the left of Fig. 5.

Fig. 5

eMET POC during factory acceptance tests at IMS Nanofabrication, Vienna, Austria, and main specifications.


Using 0.25 μm CMOS technology, a blanking plate was realized with 512×512=262,144 apertures of 4μm×4μm opening size and 32 μm pitch between the apertures within a ca. 16.4mm×16.4mm field. With 200× reduction of the electron projection optics, 256 k (k=1024) programmable beams of 20 nm beam size are projected at 50 keV beam energy to the 6 in. mask substrate within a ca. 82μm×82μm beam array field. Monitor exposures were done on resist-coated 150-mm Si wafers. With this novel electron MB optics, a very low column blur of ca. 5 nm 1 sigma was verified.8 Very low resist blur was added when using hydrogen silsesquioxane (HSQ) negative resist, which needs a very high dose of ca. 1000μC/cm2.

First eMET POC results are reported here with exposures on 6 in. mask blanks in a production worthy insensitive positive chemically amplified resist (pCAR).


eMET POC Exposure with 0.1 nm Address Grid

Using multiple exposure shot addressing (MESA) techniques17 with 20-nm beam size, there is the possibility, using overlapping shots, to expose on a 5 nm physical grid such that the line edge can be placed on a 0.1 nm address grid [Fig. 6(a)] with deviations as small as ±50pm [Fig. 6(b)]. The simulated exposure latitude with respect to edge position is 1.06±0.02nm for 10% change of dose as shown in Fig. 7(c).

Fig. 6

(a) Simulated change of edge position in 0.1 nm steps showing several examples between 30.0 and 40.0 nm. (b) Simulated deviation of edge position from 0.1 nm address grid versus line width. (c) Simulated change of edge with 10% change of dose versus line width.


Fig. 7

eMET POC exposure of 50 nm lines whose pitch was varied between 100.0 and 109.9 nm in 0.1 nm steps; vertical lines in HSQ negative resist and horizontal lines in pCAR positive resist. The line width and pitch values are written with 30 nm line width.


A rigorous experimental study was done by printing 50 nm vertical and horizontal lines with pitch values varied between 100.0 and 109.9 nm in steps of 0.1 nm. Such exposures were done in HSQ negative resist11 as well as in pCAR positive resist (Fig. 7). In both cases there is a linear relationship between critical dimension-secondary electron microscope measured pitch versus design pitch with three sigma deviations as low as 0.23 and 0.30 nm, respectively. The CD value three sigma variations are 1.6 and 1.5 nm, respectively. These experimental results demonstrate the capability of MB writing with 0.1 nm address grid.

A further study of MB printing was done by exposing 40 nm dots in HSQ negative resist (1) with 80 nm pitch and (2) with 81 nm pitch.17 There is no change of the 1.6 nm three sigma local CDU value when placing the dots at grid positions different from the 5 nm physical grid as shown in Fig. 8.

Fig. 8

eMET POC exposure of 40 nm dots in HSQ negative resist with 80 nm pitch (above) and 81 nm pitch (below).


There is the possibility to realize improved corner rounding (Fig. 9) by placing serifs at the corners (Fig. 10). According to MESA techniques, there is no throughput degradation when inducing such pattern exposure improvements.

Fig. 9

eMET POC exposure of 50 nm HP dots and 40 nm HP dots in HSQ negative resist with improved corner rounding.


Fig. 10

Bit map (above) and 50-nm HP dot exposure (below) in HSQ negative resist without (left) and with (right) improved corner rounding.



eMET POC Exposure of Optical Proximity Correction and Inverse Lithography Technology Patterns

There is agreement between simulation and exposure results of aggressive optical proximity correction (OPC) mask patterns in pCAR positive resist as demonstrated in Figs. 11 and 12.

Fig. 11

eMET POC exposure of aggressive OPC mask pattern in pCAR positive resist.


Fig. 12

eMET POC exposure of aggressive OPC mask pattern in pCAR positive resist.


This holds also for the exposure of inverse lithography technology (ILT) mask patterns in HSQ negative and pCAR positive resist (Fig. 13).

Fig. 13

eMET POC exposure of ILT mask pattern in HSQ negative and pCAR positive resist. The ILT test pattern was provided by Dai Nippon Printing18,19 and was exposed according to design and also with two-times shrink.



eMET POC Resolution Using 20 nm Beam Size

The eMET POC resolution capability, using 20-nm beam size, is shown in Fig. 14 with examples of 30-nm HP 45deg/135deg as well as 24 nm-HP and iso lines in HSQ negative and pCAR positive resist. It should be noted that HSQ resist, needing more than 1000μC/cm2 exposure dose, is useful for test purposes only, whereas the insensitive pCAR resist is fulfilling advanced mask writing industrial needs.

Fig. 14

eMET POC resolution (a) 45 deg and 45deg 30-nm HP in HSQ negative (left) and pCAR positive resist (right). (b) Vertical and horizontal 24-nm HP in HSQ. (c) Any angle 24-nm iso lines in HSQ and pCAR (angle numbers written with 30 nm line width).


It is straightforward to change the beam size to, e.g., 10 nm by using an aperture plate (Fig. 4) with 2μm×2μm openings. (For Beta and HVM tools, there will be the possibility of in situ change of beam size, as outlined in Ref. 8.) Due to the small column blur (5 nm one sigma), the very small forward scattering of 50 keV electrons in resist materials, and the small resist blur of, e.g., insensitive pCAR resist, there is expectation that using 10-nm beam size with a resolution of 12-nm HP can be achieved.

To achieve sub-10-nm HP resolution, there are possibilities to lower the aberration blur of the column optics with proprietary measures. Thus, as the Coulomb interaction blur is very small, a total column blur below 5 nm one sigma will become possible. To realize sub-10-nm HP resolution, a smaller beam size of 8 and 5 nm, respectively, will be used.


eMET Multibeam Mask Writer Roadmap

There are stringent International Technology Roadmap for Semiconductors requirements to lower the three sigma LWR for future mask technology nodes. This can only be accomplished by enhancing the resist exposure dose (dose to size for dense 11 line patterns) from 50 to 100μC/cm2 for the 11-nm HP mask technology node and below (Fig. 15).

Fig. 15

Monte Carlo simulation of the 3 sigma line width roughness for 30 nm line width versus resist exposure dose. Parameter is the combined tool and resist 1 sigma blur. The optimum total 1 sigma blur is between 5 and 7.5 nm, meeting the requirements for the 6-nm HP mask technology node when using a resist exposure dose of 100μC/cm2.


The eMET roadmap for MBMW tools is outlined in Table 1. The realized MB column is used for Alpha, Beta, and first-generation HVM mask writer tools, providing 256 k (k=1024) programmable beams for MESA-based MB writing along 82-μm-wide stripes at constant stage velocity. The eMET Alpha tool would be realized in 2014, integrating the column with a production worthy platform and stage. eMET Beta tools would be delivered in 2015 and first-generation HVM tools are scheduled in 2016.

Table 1

eMET multibeam mask writer roadmap.

Technology nodeTest: 11 nm HP (7 nm logic)11 nm HP (7 nm logic))11 nm HP (7 nm logic)11 nm HP (7 nm logic)
Beam array field82 μm×82 μm82 μm×82 μm82 μm×82 μm82 μm×82 μm
# Beams262,144262, 144262, 144262, 144
Max current (all beams “on”)0.1 to 1 μA1 μA1 μA1 μA
Throughput (≥100 μC/cm2)<10 cm2/h15 h/mask10 h/mask10 h/mask



eMET POC MB writing is demonstrated with 24-nm HP resolution and a possibility to realize complex OPC and ILT mask patterns on a 0.1 nm address grid.

Using an insensitive pCAR positive resist, the resolution capability and throughput potential is verified for the 11-nm HP mask technology node and below, where a resist exposure dose of 100μC/cm2 is required.

An eMET Alpha tool is scheduled for 2014. MBMW Beta tools are scheduled for 2015, and first HVM tools for 2016.

Productivity enhancements for 100 WPH EBDW are technically possible, but remain a great challenge. In addition to compact multicolumn tool development, substantial investments in data path and system engineering are required.



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Elmar Platzgummer received a PhD in surface physics from the Vienna University of Technology. He joined IMS Nanofabrication in 1999 and has taken a key role in the development of IMS’s multibeam technology and its application fields. He has generated more than 30 patents and 100 publications. In Oct 2005 he became chief technology officer and chief operating officer, and since Oct 2012, he is chief executive officer of IMS Nanofabrication AG.


Christof Klein received a PhD in surface science from Vienna University of Technology in 2003. In 2004 to mid 2006 he was Erwin Schroedinger fellow at the National Center for Electron Microscopy of the Lawrence Berkeley National Laboratory. In August 2006 he joined IMS Nanofabrication where he was director of Strategic Programs.


Hans Loeschner received a PhD in experimental physics from the University of Vienna. He is a cofounder of IMS Nanofabrication and VP Technical Marketing. He is coinventor of more than 20 patents and author/coauthor of more than 200 publications. In September 2012 he received the MNE Fellowship Award for the advancement of electron and ion beam technologies.

Elmar Platzgummer, Christof Klein, Hans Loeschner, "Electron multibeam technology for mask and wafer writing at 0.1 nm address grid," Journal of Micro/Nanolithography, MEMS, and MOEMS 12(3), 031108 (2 August 2013). http://dx.doi.org/10.1117/1.JMM.12.3.031108
Submission: Received ; Accepted


Semiconducting wafers

Electron beam lithography

Electron beam direct write lithography

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