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8 August 2013 The Future of Semiconductor Lithography? Look to Flash
Chris A. Mack
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Journal of Micro/Nanolithography, MEMS, and MOEMS, Vol. 12, Issue 3, 030101 (August 2013). https://doi.org/10.1117/1.JMM.12.3.030101
Abstract
Thirty years ago, when I began working in lithography for semiconductor manufacturing, the bellwether of our industry was DRAM. Resolution was defined by the smallest DRAM half-pitch, and our technology nodes were named after DRAM densities. DRAM costs often determined the affordability of a personal computer, and everyone wanted more memory. By the 1990s, microprocessors began to dominate the business, and the frequency wars pushed gate length as the most important feature size (smaller gate lengths meant faster transistors). Logic gate lengths shrank faster than pitch, and two resolution measures were needed: minimum feature size and minimum half pitch. Nodes came to be named after the feature size.
© The Authors. Published by SPIE under a Creative Commons Attribution 3.0 Unported License. Distribution or reproduction of this work in whole or in part requires full attribution of the original publication, including its DOI.
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Chris A. Mack "The Future of Semiconductor Lithography? Look to Flash," Journal of Micro/Nanolithography, MEMS, and MOEMS 12(3), 030101 (8 August 2013). https://doi.org/10.1117/1.JMM.12.3.030101
Published: 8 August 2013
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Cited by 5 scholarly publications.
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KEYWORDS
Lithography
Transistors
Semiconductors
Logic
Etching
Optical lithography
Double patterning technology
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