4 November 2014 Triple patterning lithography layout decomposition using end-cutting<xref ref-type="fn" rid="fn1" /<
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Abstract
Triple patterning lithography (TPL) is one of the most promising techniques in the 14-nm logic node and beyond. Conventional LELELE type TPL technology suffers from native conflict and overlapping problems. Recently, as an alternative process, TPL with end-cutting (LELE-EC) was proposed to overcome the limitations of LELELE manufacturing. In the LELE-EC process, the first two masks are LELE type double patterning, while the third mask is used to generate the end-cuts. Although the layout decomposition problem for LELELE has been well studied in the literature, only a few attempts have been made to address the LELE-EC layout decomposition problem. We propose a comprehensive study for LELE-EC layout decomposition. Layout graph and end-cut graph are constructed to extract all the geometrical relationships of both input layout and end-cut candidates. Based on these graphs, integer linear programming is formulated to minimize the conflict and the stitch numbers. The experimental results demonstrate the effectiveness of the proposed algorithms.
© 2015 Society of Photo-Optical Instrumentation Engineers (SPIE)
Bei Yu, Subhendu Roy, Jhih-Rong Gao, David Z. Pan, "Triple patterning lithography layout decomposition using end-cutting<xref ref-type="fn" rid="fn1" /<," Journal of Micro/Nanolithography, MEMS, and MOEMS 14(1), 011002 (4 November 2014). https://doi.org/10.1117/1.JMM.14.1.011002 . Submission:
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