23 June 2015 Fabrication of high aspect ratio structure and its releasing for silicon on insulator MEMS/MOEMS device application
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Abstract
We systematically investigate the fabrication and dry-release technology for a high aspect ratio (HAR) structure with vertical and smooth silicon etching sidewalls. One-hundred-micrometer silicon on insulator (SOI) wafers are used in this work. By optimizing the process parameters of inductively coupled plasma deep reactive-ion etching, a HAR (∼25∶1) structure with a microtrench width of 4  μm has been demonstrated. A perfect etching profile has been obtained in which the structures present an almost perfect verticality of 0.10  μm and no sidewall scallops. The root-mean square roughness of silicon sidewalls is 20 to 29 nm. An in situ dry-release method using notching effect is employed after etching. By analysis, we found that the final notch length is typically an aspect-ratio-dependent process. The structure designed in this work has been successfully released by this in situ dry-release method, and the released bottom roughness effectively prohibits the stiction mechanism. The results demonstrate potential applications for design and fabrication of HAR SOI MEMS/MOEMS.
© 2015 Society of Photo-Optical Instrumentation Engineers (SPIE)
Ji Fan, Ji Fan, Wen Ting Zhang, Wen Ting Zhang, Jin Quan Liu, Jin Quan Liu, Wen Jie Wu, Wen Jie Wu, Tao Zhu, Tao Zhu, Liang Cheng Tu, Liang Cheng Tu, } "Fabrication of high aspect ratio structure and its releasing for silicon on insulator MEMS/MOEMS device application," Journal of Micro/Nanolithography, MEMS, and MOEMS 14(2), 024502 (23 June 2015). https://doi.org/10.1117/1.JMM.14.2.024502 . Submission:
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