7 February 2017 Design technology co-optimization assessment for directed self-assembly-based lithography: design for directed self-assembly or directed self-assembly for design?
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Abstract
We report a systematic study of the feasibility of using directed self-assembly (DSA) in real product design for 7-nm fin field effect transistor (FinFET) technology. We illustrate a design technology co-optimization (DTCO) methodology and two test cases applying both line/space type and via/cut type DSA processes. We cover the parts of DSA process flow and critical design constructs as well as a full chip capable computational lithography framework for DSA. By co-optimizing all process flow and product design constructs in a holistic way using a computational DTCO flow, we point out the feasibility of manufacturing using DSA in an advanced FinFET technology node and highlight the issues in the whole DSA ecosystem before we insert DSA into manufacturing.
© 2017 Society of Photo-Optical Instrumentation Engineers (SPIE)
Kafai Lai, Chi-Chun Liu, Hsinyu Tsai, Yongan Xu, Cheng Chi, Ananthan Raghunathan, Parul Dhagat, Lin Hu, Oseo Park, Sunggon Jung, Wooyong Cho, Jaime Morillo, Jed Pitera, Kristin Schmidt, Mike Guillorn, Markus Brink, Daniel Sanders, Nelson Felix, Todd Bailey, Matthew Colburn, "Design technology co-optimization assessment for directed self-assembly-based lithography: design for directed self-assembly or directed self-assembly for design?," Journal of Micro/Nanolithography, MEMS, and MOEMS 16(1), 013502 (7 February 2017). https://doi.org/10.1117/1.JMM.16.1.013502 . Submission: Received: 19 November 2016; Accepted: 12 January 2017
Received: 19 November 2016; Accepted: 12 January 2017; Published: 7 February 2017
JOURNAL ARTICLE
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