1 July 2004 Resist footing variation and compensation over nonplanar wafer
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We report a problem regarding DUV lithography on topographical substrates and a solution for obtaining desired CD control and resist pattern shape. In our experiment, large footings for a 250-nm resist pattern are observed when the resist pattern is transferred over a polysilicon step pattern of 175 nm in height. This pattern error is not negligible regarding device performance. The exposure tool used is a KrF scanner of NA 0.6. The resist is 500 nm thick with no antireflective coating (ARC). Computer simulation is used to demonstrate the amount of the footing. A nonrigorous diffraction model did not recreate the footing appearance at the poly-Si step. However, a rigorous diffraction model of incident light in a cone recreated the footing amount at the poly-Si step faithfully. In this simulation, optical distribution in the resist over the nonplanar wafer is solved by the finite-difference time-domain (FDTD) method. Optical intensity at the sidewalls of the step differs between the two models. Experimental results as well as simulation results show that larger coherency results in larger footing. In the case of a large coherency, the illumination rays come from various directions to the wafer, and a large shadow area is likely to appear behind the steep step. We also propose a shadow model for simple footing simulation. As a consequence, optical behavior in the vicinity at the steep step has a strong impact on the resist footing.
Takashi Sato, Ayako Endo, Koji Hashimoto, Soichi Inoue, Tsuyoshi Shibata, Yuuji Kobayashi, "Resist footing variation and compensation over nonplanar wafer," Journal of Micro/Nanolithography, MEMS, and MOEMS 3(3), (1 July 2004). http://dx.doi.org/10.1117/1.1759327

Semiconducting wafers

Ion implantation


Wafer-level optics

Computer simulations

Finite-difference time-domain method

Light sources

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