1 October 2009 Predicting distortions and overlay errors due to wafer deformation during chucking on lithography scanners
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Abstract
Chucking of substrates with wafer shape and thickness variations results in elastic deformation that can cause significant in-plane distortions that lead to overlay errors in lithographic patterning. As feature sizes shrink, overlay errors due to the combination of wafer geometry and chucking become a larger fraction of the error budget and must be controlled. We use a finite element model and a lithographic correction postprocessing scheme to predict in-plane distortions that result from chucking wafers with shape variations. We then use the predictions of in-plane distortions at two different patterning steps to calculate the component of overlay error that arises from localized shape variations. Using the model, in-plane distortion and overlay errors due to chucking are examined for multiple wafers with different geometries. The results show that long spatial wavelength shape variations cause significant distortion, but can largely be mitigated through the use of simple first-order corrections that are applied in typical lithography scanners. In contrast, high-frequency spatial variations cause distortions that cannot be corrected and hence lead to meaningful overlay errors. The results provide fundamental insight into chucking-induced overlay errors and can serve as a basis for the development of higher order scanner correction schemes that explicitly account for the wafer geometry through high-density wafer shape measurements.
© (2009) Society of Photo-Optical Instrumentation Engineers (SPIE)
Kevin T. Turner, Sathish Veeraraghavan, Jaydeep K. Sinha, "Predicting distortions and overlay errors due to wafer deformation during chucking on lithography scanners," Journal of Micro/Nanolithography, MEMS, and MOEMS 8(4), 043015 (1 October 2009). https://doi.org/10.1117/1.3247857 . Submission:
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