1 July 2010 Wafer-scale process for fabricating arrays of nanopore devices
Amir G. Ahmadi, Zhengchun Peng, Peter J. Hesketh, Sankar Nair
Author Affiliations +
Abstract
Nanopore-based single-molecule analysis is a subject of strong scientific and technological interest. Recently, solid state nanopores have been demonstrated to possess advantages over biological (e.g., protein) pores due to the relative ease of tuning the pore dimensions, pore geometry, and surface chemistry. Previously demonstrated methods have been confined to the production of single nanopore devices for fundamental studies. Most of these techniques (e.g., electron microscope beams and focused ion beams) are limited in scalability, automation, and reproducibility. We demostrate a wafer-scale method for reproducibly fabricating large arrays of solid state nanopores. The method couples high-resolution electron-beam lithography and atomic layer deposition (ALD). Arrays of nanopores (825 per wafer) are successfully fabricated across 4-in. wafers with tunable pore sizes. The nanopores are fabricated in 16- to 50-nm thin silicon nitride. ALD of aluminum oxide is used to tune the nanopore size. By careful optimization of the processing steps, a device survival rate of up to 96% is achieved on a wafer with 50-nm thin silicon nitride films. Our results facilitate an important step in the development of large-scale nanopore arrays for practical applications such as biosensing.
©(2010) Society of Photo-Optical Instrumentation Engineers (SPIE)
Amir G. Ahmadi, Zhengchun Peng, Peter J. Hesketh, and Sankar Nair "Wafer-scale process for fabricating arrays of nanopore devices," Journal of Micro/Nanolithography, MEMS, and MOEMS 9(3), 033011 (1 July 2010). https://doi.org/10.1117/1.3486202
Published: 1 July 2010
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CITATIONS
Cited by 13 scholarly publications.
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KEYWORDS
Semiconducting wafers

Silicon

Array processing

Atomic layer deposition

Nanolithography

Scanning electron microscopy

Electron beam lithography

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