CMOS circuits face several limitations due to the rise in leakage current at extreme nanometer levels. It has made the industry to find suitable alternatives to meet the standards set by Moore’s law. Quantum-dot cellular automata is an emerging paradigm with the potential to replace CMOS circuits at extreme nanoscale levels. Adders are integral part in almost every digital system. In this work, a novel cost-efficient full adder is proposed. The proposed full adder has the least cost, delay, and 66% reduction in the number of wire crossings, compared to existing state-of-the-art designs. The proposed design has 40% lesser cost, compared to the existing design. The proposed adder can be extended to implement any kind of N-bit adder. The proposed full adder can be implemented as a half adder without any wire crossing and additional cells. The proposed designs are evaluated and verified using QCADesigner.
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