An optical systolic finite impulse response (FIR) filter (or convolution operation) implementation using barrel shifters and a modified signed digit (MSD) adder is discussed. The computational element used in systolic FIR filters in electronics consists of a multiplier and an accumulator. A speedup in the throughput data rate along with a high degree of regularity and concurrency can be achieved by replacing the multiplier with barrel shifters and accumulators. The optical implementation of this architecture offers reconfigurability together with the inherent speed and massive parallelism of optics. It is shown that an FIR filter of order eight can be implemented by using one liquid crystal light valve (LCLV) and one optical MSD adder. All barrel shifters in the architecture are implemented using different areas in the same LCLV structure. The MSD adder is implemented using symbolic substitution logic (SSL), and the input operands in the various cells are arranged on the same input data plane to give all required summation terms.