The noise limitations of IR imaging systems are often described as arising from predominantly temporal sources, such as background, thermal, and readout noise. Actual systems can also be limited by structured pattern) noises and drift. This is especially true with the advent of highly integrated hybrid focal plane arrays, which consist of an infrared detector array, usually photovoltaic, mated to a silicon CMOS VLSI readout device. In these arrays the large detector count, high density, and complexity create new susceptibilities for image noise. Low natural backgrounds in some systems, and the need to save aperture area in others, often force the designer to work at low background levels and high quanturn efficiencies, eliminating options for simpler FPA architectures and making control of focal plane elements more challenging. The desire to dc couple the array output and use an infrequent detector equalization update further complicates the issue. We discuss several noise processes in low-background hybrid arrays, both observed and anticipated. These processes are described through example circuits, typical of proposed and assembled lR focal plane arrays.