1 December 1997 Unified systolic array for fast computation of the discrete cosine transform, discrete sine transform, and discrete Hartley transform
Author Affiliations +
Optical Engineering, 36(12), (1997). doi:10.1117/1.601583
Abstract
A two-dimensional (2-D) very large scale integration (VLSI) architecture using a unified systolic array for fast computation of the discrete cosine transform (DCT), the discrete sine transform (DST), and the discrete Hartley transform (DHT) is proposed. The N-point discrete transform is decomposed into even- and odd-numbered frequency samples and they are computed independently at the same time. The proposed unified systolic array architecture can compute the DCT, the DST, and the DHT by defining different coefficient values specific for each transform. We also present another architecture for computation of the DHT, a modified version of the unified systolic array structure, which is faster than the unified architecture by a factor of 2. In addition, the proposed unified architecture can be employed for computation of the inverse DCT (IDCT), the inverse DST (IDST), and the inverse DHT (IDHT) with some modifications.
Sung Bum Pan, Rae-Hong Park, "Unified systolic array for fast computation of the discrete cosine transform, discrete sine transform, and discrete Hartley transform," Optical Engineering 36(12), (1 December 1997). http://dx.doi.org/10.1117/1.601583
JOURNAL ARTICLE
6 PAGES


SHARE
KEYWORDS
Computer architecture

Clocks

Optical engineering

Radon

Digital signal processing

Image compression

Very large scale integration

RELATED CONTENT


Back to Top