1 November 2001 A signed digit adder using electronically addressable spatial light modulator
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Optical Engineering, 40(11), (2001). doi:10.1117/1.1412615
Abstract
In binary digital computers addition is performed employing the carry propagation technique, which essentially limits the computing speed. For multiplication the speed is further reduced because of the number of shift and add operations. To alleviate this problem, a modified signed-bit (MSD) number system has already been proposed. The inherent parallel architecture of optical processors makes the best use of the carry-free features of MSD binary numbers. In this paper, we use a very large scale integration SLM and CCD detector to demonstrate truth table lookup for carry-free MSD addition.
Khan M. Iftekharuddin, Abdul Ahad Sami Awwal, Mohammad Abdul Salam, "A signed digit adder using electronically addressable spatial light modulator," Optical Engineering 40(11), (1 November 2001). http://dx.doi.org/10.1117/1.1412615
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KEYWORDS
Spatial light modulators

Binary data

Charge-coupled devices

Content addressable memory

Logic

Signal processing

Very large scale integration

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