1 November 2001 Method to analyze the influence of hysteresis in optical arithmetic units
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Optical Engineering, 40(11), (2001). doi:10.1117/1.1413747
Abstract
A new method to analyze the influence of possible hysteresis cycles in devices employed for optical computing architectures is reported. A simple full adder structure is taken as the basis for this method. Single units, called optical programmable logic cells, previously reported by the authors, compose this structure. These cells employ, as basic devices, on-off and SEED-like components. Their hysteresis cycles have been modeled by numerical analysis. The influence of the different characteristic cycles is studied with respect to the obtained possible errors at the output. Two different approaches have been adopted. The first one shows the change in the arithmetic result output with respect to the different values and positions of the hysteresis cycle. The second one offers a similar result, but in a polar diagram where the total behavior of the system is better analyzed.
Ana P. Gonzalez-Marcos, Jose Antonio Martin-Pereda, "Method to analyze the influence of hysteresis in optical arithmetic units," Optical Engineering 40(11), (1 November 2001). http://dx.doi.org/10.1117/1.1413747
JOURNAL ARTICLE
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KEYWORDS
Tolerancing

Logic

Optical engineering

Optical computing

Instrument modeling

Computing systems

Simulink

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