1 October 2008 Design and experimental verification of a readout integrated circuit for uncooled focal plane arrays
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Abstract
A complementary metal oxide semiconductor (CMOS) readout integrated circuit (ROIC) for an uncooled focal plane array (UFPA) is presented. The circuit consists of four major parts: a bolometer current direct injection (BCDI) input circuit, a column-shared capacitor feedback transimpedance amplifier (CTIA) integration circuit, a column-shared correlated double sampling (CDS) circuit, and a common output circuit. By applying the BCDI input circuit and the column-shared integration circuit of CTIA structure, high performance (high gain, a highly stable detector bias, and high photon current injection efficiency) is realized with a small pixel size. Moreover, the CDS circuit is utilized to reduce or eliminate noise of the readout circuit, and the common output circuit is utilized to improve the speed performance of the ROIC under low power dissipation. An experimental readout chip for a 45-µm-pitch 64×64 element VO2-based UFPA has been designed and fabricated. The measurement results of the fabricated readout chip at 298 K with 5-V supply voltage have successfully verified the readout function and the performance improvement. The proposed CMOS ROIC can be applied to a micro bolometric UFPA.
© (2008) Society of Photo-Optical Instrumentation Engineers (SPIE)
Xiqu Chen, "Design and experimental verification of a readout integrated circuit for uncooled focal plane arrays," Optical Engineering 47(10), 104402 (1 October 2008). https://doi.org/10.1117/1.2996015 . Submission:
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