1 August 2009 Hologram synthesis accelerated in field programmable gate array by partial quadratic interpolation
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Abstract
Numerical models of holograms are available but their evaluation is a very computationally intensive task. We present an acceleration algorithm for optical field synthesis suitable for the reduced occlusion method of hologram synthesis. The acceleration uses an approximation that is designed for a field programmable gate array (FPGA) and therefore it mostly uses fixed point numbers. The work describes the approximation, its fixed-point modification, and the resulting FPGA structure. The results presented show that the solution produces high-quality holograms in a significantly reduced time due to efficient FPGA implementation.
© (2009) Society of Photo-Optical Instrumentation Engineers (SPIE)
Ivo Hanak, Ivo Hanak, Pavel Zemcik, Pavel Zemcik, Martin Zadnik, Martin Zadnik, Adam Herout, Adam Herout, } "Hologram synthesis accelerated in field programmable gate array by partial quadratic interpolation," Optical Engineering 48(8), 085802 (1 August 2009). https://doi.org/10.1117/1.3205081 . Submission:
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