2.1.

Materials

PS-$b$-PMMA diblock copolymer was supplied from Tokyo Ohka Kogyo Co., Ltd., Kawasaki, Japan. Commercially available ArF photoresist, spin-on-glass (SOG), and SOC were used.

2.2.

Equipment

A CLEAN TRACK™ ACT12™ (Tokyo Electron Ltd., Tokyo, Japan) was used for the SOC coating. A CLEAN TRACK™ LITHIUS™ (Tokyo Electron Ltd.) was used for the SOG and photoresist coating, baking, and development. An NSR-S308F (Nikon Corp., 0.92 NA, Saitama, Japan) ArF excimer laser scanner was used for exposures. BCP was coated and baked using a CLEAN TRACK ACT12™. DUV irradiation to the BCP films was performed by DUV ($\lambda <200\mathrm{nm}$) exposure unit.

2.3.

Metrology

SOC prepattern CD and DSA hole pattern CD were measured by CD-SEM (Hitachi CG4000). Cross-sectional images were taken by SEM (Hitachi S-5500).

2.4.

Lithography Process

Graphoepitaxial DSAL process flow using SOC prepatterns and wet development is illustrated in Fig. 1. Stacked mask process (S-MAP), which utilizes a trilayer resist process consisting of resist, SOG, and SOC, was employed to obtain hole-type prepatterns in SOC layer. First, a silicon oxide film was deposited on a 300-mm Si wafer and SOC was spin-coated on the substrate to form an underlayer with a thickness of 100 nm. The SOG film was coated over the SOC layer with a thickness of 45 nm. A 120-nm-thick layer of ArF photoresist was spin-coated on the SOG and baked. The resist hole patterns were formed by conventional 193 nm dry lithography [Fig. 1(a)]. The resist hole pattern CD was 90 nm in diameter and the pattern pitch was 280 nm. Then, the resist hole patterns were transferred to SOC layer by using RIE to form hole-type prepatterns in SOC layer [Fig. 1(b)]. In this process step, the hole-type prepattern CD was reduced to 70 nm in diameter. A 1.5 wt % solution of PS-$b$-PMMA diblock copolymer (80.5 to $34.5\mathrm{kg}/\mathrm{mol}$ for PS and PMMA blocks, cylinder period $L_0=53.9\mathrm{nm}$, polydispersity $\mathrm{index}=1.07$) dissolved in propylene glycol monomethyl ether acetate was spin-coated on the hole-type prepatterns and baked at 110°C for 60 s with a thickness of 100 nm. To induce microphase separation, thermal annealing was performed under the condition of 240°C for 60 s in ${\mathrm{N}}_2$ atmosphere [Fig. 1(c)]. Finally, PMMA cylindrical domain at the center of the hole-type prepatterns was selectively removed by the wet development process [Fig. 1(d)]. DUV ($\lambda <200\mathrm{nm}$) was irradiated in ${\mathrm{N}}_2$ atmosphere to degrade the PMMA polymer chain, and then development was performed by immersing in organic solvent for 30 s.

Fig. 1

Contact hole shrink process using graphoepitaxial DSAL (a) ArF lithography. (b) Stacked mask process RIE. (c) BCP coating and microphase separation. (d) Wet development.

3.1.

Process Window of DSAL

As described above, the wet development consists of two process steps: DUV irradiation and organic solvent treatment. DUV irradiation condition was optimized. DUV ($\lambda <200\mathrm{nm}$) was irradiated in ${\mathrm{N}}_2$ atmosphere to prevent attenuation, and the PMMA polymer chain scission was achieved effectively. The effect of DUV exposure dose on PMMA cylindrical domain removal was evaluated. The exposure dose was changed from 180 to $1800\mathrm{mJ}/{\mathrm{cm}}^2$. Then the wafer was developed by organic solvent for 30 s. Figure 2 shows top-down and cross-sectional SEM images after wet development. The dose condition in this study was chosen as $1800\mathrm{mJ}/{\mathrm{cm}}^2$.

Fig. 2

Effect of DUV exposure dose on the PMMA cylindrical domain removal. Top-down and cross-sectional SEM images. Exposure doses are (a) $180\mathrm{mJ}/{\mathrm{cm}}^2$, (b) $360\mathrm{mJ}/{\mathrm{cm}}^2$, (c) $720\mathrm{mJ}/{\mathrm{cm}}^2$, (d) $1080\mathrm{mJ}/{\mathrm{cm}}^2$, and (e) $1800\mathrm{mJ}/{\mathrm{cm}}^2$, respectively.

In our DSAL process, the sidewall of the hole-type prepatterns was made of SOC and the bottom floor of the prepattern was made of silicon oxide. After resist patterns were transferred to S-MAP by RIE, the contact angles of the SOC sidewall and silicon oxide bottom are measured to be 49.0 and 38.0 deg, respectively. Since the contact angle of PMMA is 73 deg and that of PS is 93 deg, it is supposed that the sidewall and bottom floor of the prepatterns have an affinity for PMMA. So after microphase separation, thin film of PMMA layer would be formed along the prepattern surface as well as the cylindrical PMMA domain at the center of the prepatterns surrounded by PS domain. In the wet development, the cylindrical domains of PMMA were removed; however, the thin film of PMMA layer was not dissolved. We consider the thin PMMA layer to be too thin to be removed because of the existence of an interfacial region between PS and PMMA domains.

In order to measure the process window of DSAL, the hole-type prepattern with different CDs in diameter ranging from 40 to 100 nm with 3-nm steps were prepared by changing exposure dose of 193 nm ArF dry lithography in a 300-mm wafer. The hole-type prepattern CD and DSA hole CD were measured over 15 holes/chip and compared. Figure 3 shows SEM photomicrographs of the hole-type prepatterns [Fig. 3(a)] and DSA holes [Fig. 3(b)]. The DSA hole shape was changed in accordance with the hole-type prepattern CD. When the hole-type prepattern CD was too small, BCPs was overflowed out of the hole type prepatterns [Fig. 3(b) to 3(i)]. At the optimum prepattern CD, shapes of DSA holes are circular [Fig. 3(b)(ii)]. But at the large prepattern CD, DSA holes shape became elliptical [Fig. 3(b)(iii)]. When the prepattern CD is much larger, doughnut-shaped (lateral cylinder) were observed [Fig. 3(b)(iv)]. Correlation between the hole-type prepattern CD and the DSA hole CD is plotted in Fig. 4. When the hole-type prepattern CD is between 45 and 75 nm, DSA hole shape is circular (approximately the ratio of major/minor axis is 1.0 to 1.3) and DSA hole CD is slightly increasing but almost constant around 25 nm in diameter. On the other hand, when the prepattern hole CD is over 75 nm, the DSA hole shape is elliptical (approximately the ratio of major/minor axis is 1.5 to 1.8) and the DSA hole CD increases along with increment of the hole-type prepattern CD. CD tolerance of the hole-type prepattern in terms of DSA hole shape is $\sim 30\mathrm{nm}$.

Fig. 3

SEM photomicrographs of the hole-type prepatterns and DSA holes (a) hole-type prepattern and (b) DSA holes.

Fig. 4

Correlation between the hole-type prepattern critical dimension (CD) and the DSA hole CD.

CER of the hole-type prepattern and the DSA holes are shown in Fig. 5. CER was calculated by determining the center of the target hole pattern followed by calculating 3 sigma over 16 radii measured at different angles. Because the hole-type prepatterns were patterned by 193 nm ArF dry lithography, CER of the hole-type prepatterns were very large and measured to be 3.5 nm. However, CER of the DSA holes was greatly improved to 0.6 nm. The CER improvement is a typical advantage of DSAL, since the roughness is often a critical issue in semiconductor device manufacturing. CD tolerance of the hole-type prepattern in terms of CER is $\sim 30\mathrm{nm}$.

Fig. 5

Contact edge roughness of the hole-type prepattern and the DSA holes.

Figure 6 shows hole open yield of the DSA holes. The hole-type prepattern with different CDs in diameter ranging from 40 to 100 nm with 3-nm steps were also prepared in a 300-mm wafer. The hole open yield of the DSA holes were investigated by using top-down SEM images over 15 holes/chip and 3 chips/dose. Only circular holes were classified as “open” holes, whereas elliptical and overflowing holes were judged to be “missing” holes. The ratio of open holes to total ($=\text{open holes}+\text{missing holes}$) holes was defined as the hole open yield. In the region of the hole-type prepattern CD between 65 and 75 nm, 100% hole open yield was achieved. In the region of the hole-type prepattern CD under 65 nm, overflowing holes were observed. On the other hand, in the region of the hole-type prepattern CD over 75 nm, elliptical holes appeared, resulting in lower hole open yield. CD tolerance of the hole-type prepattern in terms of the hole open yield is $\sim 10\mathrm{nm}$ and the center of the hole-type prepattern CD is 70 nm. Hole open yield was also evaluated after pattern transfer to the silicon oxide film underneath. CD tolerance and center of the hole-type prepattern CD were consistent with those of the DSA holes.

Fig. 6

Hole open yield dependence on hole prepattern CD.

CD tolerance of the hole-type prepattern for the hole open yield is narrower than that for the DSA hole CD (Fig. 4) and for the DSA hole CER (Fig. 5). The narrowness of the CD tolerance can be explained by the cross-sectional SEM images shown in Fig. 6. In the case of the overflowing and elliptical holes, a thick PS residual layer is formed on the bottom floor of the hole-type prepattern. The thick PS residual layer impedes pattern transfer using RIE and, as a result, holes are not formed in the silicon oxide film successfully. Therefore, considering CD tolerances described above, actual process window for device manufacturing is determined to be 10 nm. This process window is enough for semiconductor manufacturing.

3.2.

Process Verification on 300 mm Wafer

Target CD of the hole-type prepatterns formed in SOC was determined to be 70 nm from the above-mentioned results. The DSAL process was verified on 300-mm wafer. CDs were measured in 82 shots on 300 mm wafer. Top-down SEM images of hole-type prepatterns and DSA hole patterns on a 300-mm wafer are shown in Fig. 7. Sub-30 nm contact hole patterns were successfully fabricated across the 300-mm wafer.

Fig. 7

Top-down SEM images of (a) prepattern and (b) DSA hole patterns on 300 mm wafer.

Comparison of CDUs between the hole-type prepatterns and the DSA hole patterns are shown in Fig. 8. Because of insufficient optimization of RIE conditions, intrawafer uniformity of the hole-type prepatterns formed in SOC was poor and their CDs at wafer edge region were larger than target CD [Fig. 8(a)]. Average CD of the hole-type prepatterns and that of the DSA hole patterns were measured to be 72.1 and 28.5 nm, respectively. By the DSAL process, CDU was greatly improved, from 7.6 to 1.4 nm. This represents a typical DSA rectification characteristic. Since CDU is important for semiconductor manufacturing, this is a major merit of DSAL.

Fig. 8

CD uniformity of (a) prepattern and (b) DSA hole patterns on 300 mm wafer.

Comparison of CER between the hole-type prepatterns and DSA hole patterns are shown in Fig. 9. Due to the insufficient optimization of the RIE, the prepatterns CER at wafer edge region were larger than the center region. CER was also improved from 3.9 to 0.73 nm. This result also represents the rectification capability of DSAL.

Fig. 9

Contact edge roughness of (a) prepattern and (b) DSA hole patterns on 300 mm wafer.

Finally, dispersion of the hole open yield on a 300-mm wafer is evaluated. Two wafers were processed successively using the same condition and hole open yield was evaluated across the whole 300-mm wafer in Fig. 10. Low yield at wafer edge region is due to large CD of the hole-type prepattern. This means that the DSAL is not responsible for the degradation of the hole open yield at the wafer edge region. Yields of 99.3% (average of two wafers and except the wafer edge region in which the hole-type prepattern CD is over 75 nm) were successfully obtained.

Fig. 10

Hole open yield on 300 mm wafers.