Device-level and module-level three-dimensional integrated circuits created using oblique processing

D. Bruce Burckel

doi:10.1117/1.JMM.15.3.034504

12 August 2016 Device-level and module-level three-dimensional integrated circuits created using oblique processing

D. Bruce Burckel

Journal of Micro/Nanolithography, MEMS, and MOEMS, Vol. 15, Issue 3, 034504 (August 2016). https://doi.org/10.1117/1.JMM.15.3.034504

Abstract

This paper demonstrates that another class of three-dimensional integrated circuits (3-D-ICs) exists, distinct from through-silicon-via-centric and monolithic 3-D-ICs. Furthermore, it is possible to create devices that are 3-D “at the device level” (i.e., with active channels oriented in each of the three coordinate axes), by performing standard CMOS fabrication operations at an angle with respect to the wafer surface into high aspect ratio silicon substrates using membrane projection lithography (MPL). MPL requires only minimal fixturing changes to standard CMOS equipment, and no change to current state-of-the-art lithography. Eliminating the constraint of two-dimensional planar device architecture enables a wide range of interconnect topologies which could help reduce interconnect resistance/capacitance, and potentially improve performance.

CC BY: © The Authors. Published by SPIE under a Creative Commons Attribution 4.0 Unported License. Distribution or reproduction of this work in whole or in part requires full attribution of the original publication, including its DOI.

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D. Bruce Burckel "Device-level and module-level three-dimensional integrated circuits created using oblique processing," Journal of Micro/Nanolithography, MEMS, and MOEMS 15(3), 034504 (12 August 2016). https://doi.org/10.1117/1.JMM.15.3.034504

Published: 12 August 2016

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KEYWORDS

Silicon

Transistors

Integrated circuits

Metals

Capacitance

Spine

Etching

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