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5 September 2019 Expanded area metrology for tip-based wafer inspection in the nanomanufacturing of electronic devices
Tsung-Fu Yao, Liam G. Connolly, Michael Cullinan
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Effective measurement of fabricated structures is critical to the cost-effective production of modern electronics. However, traditional tip-based approaches are poorly suited to in-line inspection at current manufacturing speeds. We present the development of a large area inspection method to address throughput constraints due to the narrow field-of-view (FOV) inherent in conventional tip-based measurement. The proposed proof-of-concept system can perform simultaneous, noncontact inspection at multiple hotspots using single-chip atomic force microscopes (sc-AFMs) with nanometer-scale resolution. The tool has a throughput of ∼60  wafers  /  h for five-site measurement on a 4-in. wafer, corresponding to a nanometrology throughput of ∼66,000  μm2  /  h. This methodology can be used to not only locate subwavelength “killer” defects but also to measure topography for in-line process control. Further, a postprocessing workflow is developed to stitch together adjacent scans measured in a serial fashion and expand the FOV of each individual sc-AFM such that total inspection area per cycle can be balanced with throughput to perform larger area inspection for uses such as defect root-cause analysis.

© 2019 Society of Photo-Optical Instrumentation Engineers (SPIE) 1932-5150/2019/$28.00 © 2019 SPIE
Tsung-Fu Yao, Liam G. Connolly, and Michael Cullinan "Expanded area metrology for tip-based wafer inspection in the nanomanufacturing of electronic devices," Journal of Micro/Nanolithography, MEMS, and MOEMS 18(3), 034003 (5 September 2019).
Received: 20 February 2019; Accepted: 25 July 2019; Published: 5 September 2019

Cited by 4 scholarly publications.
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