1 March 2009 Fabrication and characterization of integrated three-dimensional linear taper on silicon-on-insulator
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Abstract
Fabrication and characterization of an integrated 3-D linear taper are reported, which is based on (111) silicon-on-insulator for efficient coupling between a single-mode fiber and planar photonic devices. The fabrication process involved wafer bonding, anisotropic etching, and dry etching. The 3-D taper measured 75 μm in length. The input waveguide, 5.6×5 μm2 in dimensions of the end facet, was compressed to dimensions of 0.6×1.8 μm2 of the end facet in the output waveguide. The measured average net transmission loss was 0.52 dB at the wavelength of 1.55 μm.
Yang, Fang, Wu, Chen, Zhang, Wang, and Zou: Fabrication and characterization of integrated three-dimensional linear taper on silicon-on-insulator

Waveguides based on silicon-on-insulator (SOI)1, 2, 3 are attractive for optical integrated circuits (OICs) because of their potential compatibility with CMOS technology. Furthermore, the large difference between the refractive indices of the core (Si) and the cladding/insulator (air and SiO2 ) enables the realization of optical waveguides with submicrometer dimensions, which allows an ultrasmall bending radius.4 However, the great disparity in size between the mode field diameter (MFDs) of standard single-mode fibers and the Si waveguides will result in excessive coupling losses when they are directly coupled. Clearly, a compact and efficient mode converter is needed. Several approaches have been proposed, such as prism couplers,5 grating couplers,6 tapered optical fibers,6 and microlenses.7 The first approach needs hybrid integration between the coupler and the OIC, adding to complexity and cost. The second approach offers good efficiency but is typically narrowband. The last two approaches have good efficiency but have stringent alignment tolerances, thereby leading to high packaging costs. An ideal structure would be one that tapers in both the vertical and lateral directions8 and can be monolithically integrated with the OIC. Many techniques, such as the dip-etch process,9 dynamic etch mask technique,10 diffusion-limited etching,11 and stepped etching12 have been proposed to fabricate vertically tapered structures. All of these methods have disadvantages of either low reproducibility or labor-intensive processing. Other techniques, like dry etching using a shadow mask13, 14 requires very fine lithography and do not necessarily allow for processing on the wafer scale.

In this paper, we report the fabrication and characterization of the integrated 3-D linear tapered coupler on silicon-on-insulator. The schematic diagram is shown in Fig. 1. The 3-D taper is connecting with an input and an output waveguide. The 3-D taper compresses, by field transformation, the mode field of the input waveguide (waveguide A) in the Y direction and simultaneously in the X direction. Because the confinement of light is based on internal reflection, the slope of the taper should not be large. By selecting the suitable SOI wafers and tailoring the length (L) of the taper, the MFDs of the input waveguide (waveguide A) and the output waveguide (waveguide B) can be well controlled for efficient coupling. Although the above description of the operation principle is made in terms of a spot-size compressor, the same structure, when it operates in reverse, can function as a spot-size expander. Clearly, the 3-D tapered coupler is simple, compact, and expected to be insensitive to a large range of the wavelength centered at 1.55μm .

Fig. 1

Schematic diagram of the 3-D taper coupling light between a single-mode fiber and planar optical devices.

030503_1_1.jpg

The 3-D linear taper is realized on (111) SOI wafers. It is worthy to note that the surface-orientation phase separation of commercial (111) SOI wafer is 4deg . There is slight difference, no more than 0.5deg , between different batches of wafers. That is, the surface is deflected 4deg from (111) crystal plane. Therefore, the vertical slope of the taper described above can be realized by anisotropic etching, because the etching rates of silicon in the ⟨100⟩ and ⟨110⟩ crystal orientations are much faster than that in the ⟨111⟩ orientation in a strongly anisotropic etchant, such as KOH.15 Figure 2 shows the scanning electronic microscopy (SEM) measurement of the profile of the top-Si layer in selected region on (111) SOI wafer after etching in 40wt% KOH solution at 55°C for 100min . The measured slope of the Si (111) crystal plane is 0.066 (3.8deg) . The root-mean-square roughness of the (111) plane is 0.78nm , measured by atomic force microscope.

Fig. 2

SEM measurement of the profile of top-Si on Si (111)-SOI wafer after etching in 40wt% KOH solution at 55°C for 100min .

030503_1_2.jpg

For a SMF of known MFDs (4.5μm) to be used, the dimensions of the end facet of input waveguide (waveguide A in Fig. 1) were determined to provide desirable matching of the mode fields involved; the thickness of waveguide A was designed to be 5.5μm . Depending on the size of planar optical devices, the thickness of waveguide B was designed to be 0.5μm . In this paper, only the transmission loss was of concern. The length of the 3-D linear taper was determined to be 75μm according to the slope of (111) plane and the difference in thicknesses between waveguides A and B.

In fabrication, the structure was realized by standard silicon micromachining technique. Figure 3 shows the schematic diagram of the fabrication process. A (111) SOI wafer with a 5-μm -thick top Si layer was employed in the experiment. Rectangles (100×140μm2) were patterned on the top-Si layer by photolithography and dry etching techniques. Then, the wafer was bonded with another SOI wafer, whose thicknesses of the top-Si layer and buried oxide layer were 800nm and 1μm , respectively. Then, the Si substrate and buried oxide layer of initial wafer were removed. At that moment, stairs with 5μm in height were formed on the top-Si layer [refer to Fig. 3]. Thermal oxidation was then performed to engender a 450-nm -thick SiO2 layer as mask layer on the surface. Squares windows (75×75μm2) were patterned on the mask layer by photolithography and subsequent etching in aqueous dilute HF. After all these were done, anisotropic etching was performed in 40wt% KOH solution at 55°C for 100min to form the vertical slope. Finally, the waveguides and horizontal slopes were formed by inductively coupled plasma (ICP) etching after lithography. In the fabricated structure, the measured endface dimensions of the input and output waveguides were 5.6×5 and 0.6×1.8μm2 , respectively. The length of the 3-D taper was 75μm , while the slope was 0.066. The SEM measurement of the fabricated structure is shown in Fig. 4. The thicknesses of the input and output waveguides can be controlled accurately by employing suitable SOI wafers. The length of the taper depends on the difference in thicknesses between input and output waveguides.

Fig. 3

Schematic diagram of the fabrication process: (a) patterning resist, (b)etching top-Si layer by ICP, (c) bonding to another wafer with 800nm top-Si layer, (d) removing substrate and polishing, (e) oxidation, (f) patterning, (g) etching silica in HF, (h) anisotropic etching in KOH, and (i) lithography and dry etching.

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Fig. 4

SEM measurement of the fabricated structure.

030503_1_4.jpg

After both endfaces of the input and output waveguides were polished by chemical mechanical polishing, the total transmission loss from the input plane A to the output plane B, indicated in Fig. 5, were measured by exciting the input end using a lensed fiber with a MFD of 4.5μm . The same fiber was used to collect light for detection at the output end. Figure 5 shows the schematic diagram of characterization of the fabricated structure. A simultaneously fabricated waveguide without the 3-D linear taper was taken for comparison. It is to be noted that the output waveguide involved was very short (50μm) in order to minimize the effect of its propagation loss on the accuracy of the transmission loss measurement. The total length of the device was 1.5mm . Therefore, the net transmission loss of the 3-D linear taper can be obtained by subtracting the transmission loss of the waveguide without 3-D taper from the total transmission loss of the waveguide with 3-D taper. Table 1 shows the measured results of the samples. The average net transmission loss of five samples measured in this way was 0.52dB at the wavelength of 1.55μm .

Fig. 5

Schematic diagram of characterization of the 3-D linear taper.

030503_1_5.jpg

Table 1

Measured results of the samples. The insert transmision losses were measured between the input fiber and output fiber.

SampleInsert transmission loss ofwaveguides without tapers(dB)Insert transmission loss ofwaveguides with tapers(dB)Net transmission loss oftapers(dB)
16.877.420.55
27.400.53
36.857.350.50
47.380.53
57.350.50

In conclusion, fabrication and characterization of a 3-D linear taper for efficient coupling between a single-mode fiber and planar photonic devices are reported. The input waveguide, 5.6×5μm2 in dimension of the end facet, was compressed to dimensions of 0.6×1.8μm2 in the output waveguide with average net transmission loss of 0.52dB at the wavelength of 1.55μm . The integrated 3-D taper possesses desirable features of structural simplicity, compactness, compatible with standard micromachining technics, high tolerance to fabrication errors, large optical bandwidth, and simplicity in design.

Acknowledgment

This work was financially supported by the National Science Foundation of China (Grant No. 60721004) and the Shanghai Institute of Microsystem and Information Technology Fund for Young Scholars.

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© (2009) Society of Photo-Optical Instrumentation Engineers (SPIE)
Zhifeng Yang, Na Fang, Aimin Wu, Jing Chen, Miao Zhang, Xi Wang, Shichang Zou, "Fabrication and characterization of integrated three-dimensional linear taper on silicon-on-insulator," Optical Engineering 48(3), 030503 (1 March 2009). https://doi.org/10.1117/1.3095916 . Submission:
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