Traditional holographic recording can produce realistic and large three-dimensional (3-D) objects with a large viewing field. However, the recording process is extremely sensitive to the various modes of vibrations and also to background stray light. Once the hologram is recorded into the media, the process is usually irreversible. This would limit the objects to be in static form only. Blanche et al.1 demonstrated holographic recording with media that is rewritable. A large 3-D reconstruction was demonstrated. However, the read/write cycle takes around 2 s to complete. The refresh rate is insufficient to play a video at the standard 60 Hz.
Contrary to the traditional way of recording holograms through physical means, computer-generated holograms (CGHs)2 are calculated mathematically. This technique avoids the hassles of the traditional recording process and the need for a real 3-D object to be present. There are many different algorithms for computing a CGH.3,4 Some algorithms include Fourier Ping-Pong5 algorithm, coherent ray tracing (CRT)6 algorithm, and look-up-table7 (LUT) algorithm. The CGHs are loaded onto a device called a spatial light modulator (SLM) and displayed on the SLM’s optically active region. When the reference laser beam is shone onto the SLM’s optically active region, diffraction occurs and the calculated 3-D object is reconstructed. There is much interest in using CGH for holographic display as computational power increases and SLM technologies improve.
One major drawback of using SLM for holographic display is the limited resolution of the SLM, or more specifically, the pixel number (or pixel count) of the SLM. According to Stanley et al.:8
From the above equations, for a constant pixel pitch, the pixel count has a significant effect on the image size and viewing zone of the reconstructed 3-D holographic object. Note that the equations apply to the horizontal and vertical directions separately. For a digital holographic display of about 20 in. diagonally and a 20-deg viewing zone, the hologram pixel count will be around to . The pixel count of current SLM technologies is thus insufficient for such large holographic displays. To increase the pixel count, the tiling of subholograms is an essential step. The tiling of these subholograms can be done either physically, optically, or both.
QineticQ9 reports a way of increasing the pixel count through the use of electronically addressed (EA) and optically addressed (OA) SLMs together with replication optics in a process termed “Active-Tiling.” The subholograms are loaded onto an EASLM and multiple images of the same EASLM are replicated and imaged onto an OASLM, forming a large hologram on the display area of the OASLM. A pixel count of 100 Megapixels was reported. However, the QinetiQ approach requires the use of an OASLM, which may be difficult to manufacture, and in addition the resolution is limited.
The Telecommunication Advancement Organization (TAO) in Japan10,11 proposed a way of tiling SLMs physically by arranging five LCDs horizontally. This method increased the pixel count and also the horizontal viewing angle. A pixel count of 15 Megapixels was reported. However, their pixel count is still not high and they did not include other ways to further increase their pixel count.
The Institute of Symbiotic Science and Technology, Tokyo University of Agriculture and Technology12 demonstrated a one-dimensional (1-D) scanning approach in which the subhologram is magnified along the vertical axis only. This vertical “line” hologram is then scanned horizontally using a galvanometric scanner onto a diffuser. They were able to achieve large horizontal viewing angle while discarding vertical parallax in their system, also known as the “horizontal parallax only” (HPO) system.
The Massachusetts Institute of Technology13 (MIT) developed holographic display systems (Mark I, II, and III) that employ the use of an acousto-optical modulator (AOM), polygon, and galvanometric scanner. The polygon scanner serves to multiplex the image of the AOM crystal into a horizontal line, which is then scanned by the vertical galvanometric scanner to complete the hologram. The Mark systems are also HPO systems.
In the Data Storage Institute, a first-generation monochrome digital 3-D holographic system was developed.14 A digital-mirror device (DMD) was used as the SLM for the system with resolution of and pixel pitch of 10.8 μm. A two-axis scanning sequence was implemented in which the 3-D object is first divided into subobjects and its corresponding holograms are calculated.15 Each subhologram is time-sequentially loaded onto the DMD and synchronously illuminated with a red laser for reconstruction. The two-axis scanning mirror device tiles the subholograms on various positions of a telecentric lens. The achieved pixel count was 50 Megapixels, with a 25-Hz refresh rate.
For this paper, a novel approach of increasing pixel count of hologram by the combined methods of physical and optical scan tiling is presented. This approach was implemented in our second-generation system and a large 3-D object was reconstructed successfully with screen size of 10 in. and full parallax when the SLMs are synchronously illuminated with lasers. The hologram pixel count achieved is 377.5 Megapixels at refresh rate of 60 fps.
In our system, the final hologram pixel count after physical tiling and optical scan tiling is 377.5 megapixels. The SLMs, lasers, and galvanometric scanning mirror are all synchronized with the launching of the holograms onto the SLM and controlled via a field-programmable gate array (FPGA) to provide a flickerless and large 3-D holographic display. The SLM is a binary-stable device.
The schematic drawing of our system is shown in Fig. 1. Our system consists of laser sources/drivers, collimation optics, filtering optics, magnification optics, beam splitters, parabolic mirrors, SLMs/drivers, and FPGA (not shown).
Two sets of green lasers are used as sources of illumination for our system. The wavelength used is 532 nm, with output power up to 350 mW.
The SLM used is ferro-electric liquid crystal on silicon (FLCoS), SXGA-R3, from Fourth Dimension Display Limited. Each SLM has a resolution of , with pixel count 1.3 Megapixels (pixel size 13.62 μm). The physically tiled SLM array (24 SLMs) has a total pixel count of around 31.4 Megapixels. The SLM is a binary phase modulator used to display binary CGHs and accepts digital visual interface (DVI) frames from the computer. The frame rates it can support are 60 Hz, 75 Hz, and 80 Hz.
The one-axis scanning mirror device used is the 6231C closed-loop galvanometer mounted with a 12-mm -mirror from Cambridge Technologies, and is driven by the electrical servo driver 67723 from Cambridge Technologies. The servo driver takes in a voltage input from to , and is able to produce a maximum excursion of 40 deg, from to 20 deg for the galvanometer. By varying the input voltage to the servo driver, we can control the angular position of the mirror, and hence, the directions of the laser beam. We shall refer to the galvanometer and the mounted -mirror as a single device, “scanning mirror,” henceforth. The scanning mirror is used to optically scan-tile the subholograms to form a larger hologram by directing the individual “optical tiles” to predetermined spatial positions. This increases the pixel count in the final hologram, which improves on the size of the reconstructed object.
The FPGA used is the Xilinx Spartan 3A DSP 1800A board. It is used to control the synchronization of the frames launched onto the SLM, the angular position of the scanning mirror, and the timing and intensity of the lasers for overall system control.
Sixteen-bit digital-to-analog converters (DAC) are used to provide the analog driving voltages to the scanning mirrors and lasers. The FPGA communicates with the DAC via the serial-peripheral interface (SPI). For our setup, there are three DAC channels, one for each laser (two sets of green lasers), which controls the amount of output power for each laser and one for the scanning mirror servo driver, which controls the angular position of the scanning mirror.
A master PC is used to control the SLM driver and the FPGA. It computes and stores the binary holograms. Finally, it acts as a user interface for the user.
The two sets of green lasers are placed one on top of the other. Each laser beam is expanded by the magnification optics and collimated. The laser beams pass through filtering optics subsequently to improve the beam quality and are shone onto the SLM array. The SLM array’s active area requires a beam size of to be fully illuminated. Due to the physical limits on the size of commercially available lenses, the two laser beams are each expanded only to 100 mm in diameter, and are then shaped to . The two beams are combined to yield a beam, which can then cover the entire area of the SLM array active region simultaneously. The arrangement of the SLMs in the array will be discussed in details in Sec. 3.
After exiting the SLM array, the laser beams are directed towards parabolic mirror 1, which performs a focusing function on the combined laser beam. Parabolic mirror 1 has a diameter of 320 mm, with a focal length of 700 mm. The scanning mirror is placed slightly behind the Fourier plane of parabolic mirror 1, while a filter is placed at the Fourier plane of parabolic mirror 1. The filter blocks off the unwanted zero order and other higher orders of the focused laser beams. Only the diffraction within the first order of the laser beam is allowed to reach the scanning mirror. The scanning mirror then performs scan-tiling by projecting the laser beam at several different angular positions towards parabolic mirror 2. Details of the scan-tiling will be discussed in Sec. 4. Parabolic mirror 2 has a diameter of 300 mm, with a focal length of 350 mm. Parabolic mirror 2 will collimate the scanned laser beams. Due to the focal lengths of parabolic mirror 1 and 2, the magnification ratio is . Thus, the hologram pixel size, and the pixel pitch, is halved (demagnification), which improves the viewing angle of the system. The final mirror will direct the 3-D object reconstructed from the tiled hologram towards the observer. Optical scan tiling will multiply the pixel count of the SLM array, which will result in a much larger hologram.
As compared to the CGH display systems described in Sec. 1, our system is able to produce a higher hologram pixel count while offering full parallax at a replay rate of 60 Hz. These advantages are not found simultaneously in the systems mentioned.
Physical Tiling of Spatial Light Modulators
One method of increasing the pixel count of a hologram is to tile more than one SLM physically. However, for our SLM, due to the printed circuit board (PCB) borders surrounding the optically active region of the SLM, if we were to tile them physically by placing them side by side, the PCB borders will create a gap in between the optically active region of the SLM. These gaps act like a diffraction grating to the laser and have a negative effect on the quality of the reconstructed object. As such, we wish to tile only the optically active region of the SLM.
In order to tile only the active region of the SLMs, the SLMs are arranged as shown in Fig. 2. The SLMs are placed on perpendicular sides of a plate beam splitter (PBS), with a gap in between each SLM equal to the width of the optically active region. The input laser beam is split into two and illuminates the SLMs on the perpendicular sides of the PBS. The SLMs are positioned such that the gap is complemented by the optically active region of the SLM on the other side. Figure 3 shows the physical arrangement of the 24 SLMs in our system. The two complementing sides of the SLM array will display a hologram where the active regions are seamlessly tiled when combined with the PBS. This method of combining will tile the active regions in one direction. For our system, we tiled the active area in the Y-direction using physical tiling, thus each column is seamlessly tiled. Each column contains eight SLMs (four on each side of the PBS) and there are three such columns for a total of 24 SLMs. The result of the physical tiling is shown in Fig. 4.
To compensate for the other direction through physical tiling, more beam splitters would be needed, which would make the system’s optical efficiency lower and increases the complexity of the system greatly. Therefore, it is not desirable to tile the active region of the other direction using this same method.
A more effective method to tile the active region in the other direction is through “optical scan-tiling”.
Optical Scan Tiling of SLM Array Output
Using our display system, we were able to display 3-D objects reconstructed with our tiled hologram at a standard video refresh rate of 60 fps. This essentially means that there are no flickers visible to the average observer.
The output from the SLM array (Fig. 4) is an elementary “optical tile” for our scan tiling. Each column is spaced out by a gap equal to the height of the SLM’s optically active region. The scan tiling will fill in these gaps by projecting the columns of the adjacent optical tiles into the gaps of the previous optical tile to form a complete hologram.
A program module was developed in very-high-speed integrated circuits hardware description language (VHDL) and implemented on the Spartan 3A FPGA board. The digital SLM driving signal is the master signal for our system. Two green lasers and the scanning mirror are synchronized with the SLM driving signal. The objectives of the synchronization are to ensure that:
• The scanning mirror turns only when there are no data loaded onto the SLM and the lasers are disabled.
• The scanning mirror is stabilized at the correct angular position before the data are loaded onto the SLM and before the lasers are enabled.
• The lasers are enabled only after the SLM data are loaded onto the SLM.
• The lasers are disabled when data are removed from the SLM.
• The whole scanning sequence is completed at 60 Hz.
The SLM driver takes digital visual interface (DVI) data from a computer. The DVI refresh rate is 60 Hz and the SLM driver produces 24 SLM “bit planes” within each DVI frame. Detailed timing of the signal is shown in Table 1. The SLM data is loaded onto the SLM at the rising edge of the bit planes and removed at the falling edge of the bit planes. This SLM driving signal is fixed and is not customizable by the user.
Timing analysis for SLM driving signal and scanning mirror step responses.
|DVI frame period||≈16.65 ms||For 60 Hz|
|SLM “HIGH” time||217.60 μs||Time when data are on the SLM|
|SLM “LOW” time||460.45 μs||Time when data are not on the SLM|
|Bit-plane time||678.05 μs||SLM “HIGH” time+SLM “LOW” time|
|Small step response (≈8 deg)||≈200 μs||Turning and stabilizing time for small step|
|Big step response (≈4–5 deg)||≈900–1000 μs||Turning and stabilizing time for big step|
Owing to the physical tiling configuration of the SLM array and our display system, there are three major movements, or steps, that may be required for the scanning mirror to achieve optical scan-tiling, namely “small step,” “big step,” and “return step.” For a small step, the angular excursion of the scanning mirror is approximately 0.8 deg. For a big step, the angular excursion is about 4 deg to 4.8 deg. The angular excursions were determined experimentally. The return step is the angular excursion from the final position back to the initial starting position. We will omit the analysis of the return step for the moment. The response time (excursion time and settling time) for the small and big steps are shown in Table 1.
In line with the objectives of the synchronization stated above, the scanning mirror should only turn when there are no data loaded on the SLMs and the lasers are disabled (i.e., the SLM driving signal is “LOW”). From Table 1, it can be seen that for a small step, its response time is well within the SLM “LOW” time; that is, the scanning mirror can be stabilized after a small step before the next loading of the SLM data. However, for the big step, its response time is not within the SLM “LOW” time; that is, the scanning mirror will not have time to fully stabilize after a big step before the next loading of the data. Since the angular position of the scanning mirror is dependent on the display system, the angular excursion for the small and big step cannot be changed to alter the response times significantly. As such, we are unable to utilize all of the 24 bit planes to load data if there are big steps involved. For every big step, the next bit plane will not be loaded with data in order to accommodate the big step response time.
Another scan sequence includes the Raster scanning sequence, which involves a large “fly back” or return step15 at the end of each sequence or frame. Taking into consideration the above-mentioned points, we will do an analysis between the Raster scanning sequence and our scanning sequence.
Figure 5 shows the tiling sequence for Raster scanning for our system. From Fig. 5, it can be deduced that the number of steps to be taken should be even. If the number of positions is odd, then there will be one extra tile that will not be compensated.
To accommodate the big step response, the next bit plane after the big step will not be loaded with data. Thus, every big step takes a time of two bit plane periods each to complete while the small step takes a time of 1 bit plane to complete. Extrapolating this, since the total number of steps must be even and the total number of bit planes is 24, the theoretical maximum number of steps we can get is 16 steps, made up of eight small steps, seven big steps, and one return step to complete a frame.
Now, if we consider the time required for the return step, having 16 steps will mean that for the return step, there is only two bit plane time left for the scanning mirror to return to the initial position and stabilize. The scanning mirror would have to turn around 34.4 deg within the two bit plane timings. It was determined experimentally that the scanning mirror used is not fast enough to rotate 34.4 deg within two bit plane timings. Thus it is not feasible to scan 16 steps.
Therefore, by considering the speed of the scanning mirror, the amount of excursion, and the bit plane timings, it was found that the maximum number of steps we may take is 12 steps, made up of six small steps, five big steps, and one return step in order to complete the sequence at 60 Hz.
Our Scanning Sequence
As with the Raster scan, the number of steps for our scanning sequence must be even to fully fill in the gaps of the hologram and the maximum number of steps to take is 12, made up of 10 big steps, two small steps, and no return step.
Figure 6 shows the tiling sequence for our scanning. At , this is the initial starting position of the scanning mirror and is the scan sequence period ( or 16.7 ms). For the next five timings ( to ), the scanning mirror turns a big step clockwise of about 4.8 deg each and stops after it reaches the next position. At , the scanning mirror turns a small step of about 0.8 deg. Next, the scanning mirror will fill in the by turning a big step anti-clockwise each from to . Finally, the scanning mirror turns a small step anti-clockwise to return back to the initial starting position at .
The timing diagram is shown in Fig. 7. The flat parts of the input indicate that the scanning mirror is in stable position. For the scanning mirror driving signal, a sharp change is shown in Fig. 7 from a stable position to the next stable position. In the actual implementation, a “cosine-wave change” is applied when changing instead of a sharp change. The first half of a cosine wave is applied when the scanning mirror driving voltage is decreasing while the second half of a cosine wave is applied when the scanning mirror driving voltage is increasing. This is done to ensure that motion of the scanning mirror is gradated to prevent the scanning mirror from “slamming” into position and damaging the device. The resultant hologram from the optical scan-tiling is shown in Fig. 8.
As the sequence is completed at 60 Hz, the overall effect seen is a flickerless and seamless optical tiling of the SLMs (Fig. 8). The flowchart of the system’s control algorithm is summarized in Fig. 9.
Since both our scanning sequence and the Raster scanning sequence can scan up to 12 steps, the main advantage of our approach against the conventional Raster scan is the absence of the large return step. Such a large step would mean that much more time will be spent on the stabilization of the scanning mirror due to its mechanical nature. Also, the peak current drawn by the servo driver in order to perform such a large excursion within a short amount of time will heat up the driver considerably and may lead to performance degradation of the servo driver and scanning mirror over time. For our approach, the large return step is split into several smaller steps, thus limiting the peak current drawn considerably.
For our system, the CGHs are computed with an in-house developed algorithm16 based on coherent ray tracing (CRT) and novel split look-up-table (S-LUT) approach. CRT algorithm simulates light propagation from all sampling points to all hologram pixels. High-quality image reconstruction with full parallax can be obtained with low memory consumption.6 Our algorithm enables calculation of large holograms used to reconstruct complicated 3-D objects at high speed with low memory usage.
Also, the CGH algorithm is implemented on graphical processing units (GPUs) and compute unified device architecture (CUDA). This leads to a further improvement in the computational speed for the holograms.
The computed CGH is divided equally into , giving a total of 288 subholograms. Each column are grouped into threes (24 subholograms) according to Fig. 10. The sequence in which each group is launched is the same as our SLM tiling sequence shown in Fig. 6, where group 1 is launched onto the SLM at position 1 at , group 2 is launched at position 2 at , and so on.
Figure 11 shows the 3-D object reconstructed from our system using our tiling approach. The object is taken at two different depths to show the 3-D effect. There are further works that can be done to improve the quality of our reconstructions. From Fig. 4 it can be seen that there are some slight distortions of the physically tiled array. The distortions are mainly due to the imperfections of our customized large aperture parabolic mirrors. If the qualities of the parabolic mirrors are improved, this will lead to better image quality. Also, the limited size of our commercially available lenses contributed to the distortions as the large laser beam passes through near the edge of the lenses, where there are high amounts of distortions.
Due to the number of SLMs and optics involved in the system, the tuning and alignment of the system is a tedious but important task. Some of the imperfections seen in Fig. 11 are a result of some slight misalignment of the SLMs and optics.
From Fig. 4 it can be seen that the homogeneity of the lasers used is not very uniform, and this would impact the quality of the reconstructions. More work could be done to improve this uniformity.
The SLM driving signal is not customizable to the user. As such we were only able to scan 12 steps for our optical scan tiling. If we can, for example, reduce the SLM “HIGH” time and lengthen the SLM “LOW” time, we can accommodate the big step response without sacrificing any bit planes to increase the number of scan tiling steps. A faster scanning mirror actuator with the same scanning mirror dimensions will also increase the number of scan-tiling steps.
We have proposed a novel approach for combining physical tiling and optical scan tiling of holograms to increase the hologram pixel count from a single SLM of 1.3 Megapixels to 377.5 Megapixels with a screen size of 10” by 3”. The tiling is done firstly though physical tiling of 24 SLMs and subsequently through 1-D optical scan tiling with galvanometric scanning mirror. 3-D reconstructed objects with full parallax were successfully replayed at 60 fps with our FPGA based display system.
This work is funded by Agency for Science, Technology, and Research (A*STAR) HOME 2015 Programme.
Zhi Ming Abel Lum received his BEng degree (2nd Class Upper) in electrical and electronics engineering from Nanyang Technological University (NTU), 2009. He is currently a research engineer in Data Storage Institute (DSI), A*STAR. His main research area is in designing control and synchronization system using field programmable gate arrays (FPGA) for holographic display systems.
Xinan Liang is a senior research fellow in Optical Materials & System Division at Data Storage Institute (DSI), Agency for Science, Technology and Research (A*STAR) Singapore. He earned his MSc in 1997 from the Chinese Academy of Space Technology (CAST) and PhD in 2000 from the Chinese Academy of Science (CAS). His current research relates to holographic data storage media and holographic display technology.
Yuechao Pan received his BEng degree in computer engineering from National University of Singapore, 2008. He is currently a research engineer at Data Storage Institute, A*STAR, Singapore. His main research interest is in fast CGH computation and hardware integration for holographic three-dimensional display system. He is a member of IEEE and ACM.
Ruitao Zheng received his BEng degree in optics instruments from Tianjin University in 1995, MS degree in optics instruments from Shanghai Institute of Optics and Fine Mechanics (Chinese Academy of Sciences) in 1998, and PhD in photonics from Nanyang Technological University (NTU) in 2004. He is currently a research scientist in Data Storage Institute (DSI), A*STAR. His main research area is optics devices/system design for holographic display systems.
Xuewu Xu obtained his BSc degree from Nanjing University and his PhD degree from Chinese Academy of Sciences (CAS). He is a research scientist of Data Storage Institute. His research interests include holography for three-dimensional display and high-density data storage, holographic media, and crystal materials. He is a member of The Society for Information Display (SID) and a member of International Organizing Committee of International Workshop on Holographic Memories & Display (IWHM&D).